Service manual
-
PC- l600
Pin
Symbol
No.
91
LHMIO
92
LHNMIO
93
LH
OPFI
94
R
STO
In
/Out
Qu.
I
n/Out
-I,
Qu.
Active
Function
18II'ei
High
An
interrupt
is
sent
to
tna
SC7852. When
there
is
an
interrupt
request
to
the
LH·5803,
t
his
signal goes high.
H
igh
111
Goes high
when
the
LH·5803
is
94
u
H
and
when
PU
-
PV
is
high (CE-158 internel
ROMI.
121
Bacom8$ an
input
during
reset. So,
it
mu
st
be
pulled
up
or
down
with
the
external
r
esinor
. With
the
PC-1
600,
it
is
pulled
down.
High
Receives the OPF
output
of
the
LH-5803. Pulled
down
internallv.
High
Reset
output
(high)
to
the
LH-5803. When 8 rll$et
is
issued
to
the
Z·80
(RSTIN
al
l
owl.
it
makM RSTO high.
The
rest
can
only
be
cleared
when
the
Z-80 first hands
dow
n
the
control
to
the
LH
-5803. With this the LH
·58
03
s
tarts
to
run.
lI:
Pulled
up
to
vee
with
the
internal resistor,
lOOK
ohms -
500K
ohms •
.. : Internal resistfloce
of
200K
ohms
-
500K
ohms
is
active
when
the
CPU
is
on,
but
no MOS resistance
is
met
wh
en
the CPU
is
off.
9·2
.
Main
CPU
1 (LH5803)
pin
d
es
cript
ion
Pin
No.
2
3
4
5
6
7
B
9
SVmbol
RE
SET
(NC)
BRa
BFI
VGG
BFO
OPF
BAK
vee
In
/Out
10
10
Active
level
Function
CPU reset input. A high
on
this line causes
the
rll$et.
The
contents
of
the
address
FF
FEH are transferred
to
the
PH
register and
the
contenU
of
FFFFH
to
the
PL
register. When
the
reset
input
changes from high
to
low,
the
program
starts
to
8)(ecute
from
the
addrass sat in
the
program
counter.
Bus request.
Connected
to
ELH
of
the
SC7852
output.
BF flip-flop
output
(BFO)
end
input
(BF I).
T
he
BF
fiip-flop
is
reset
by
the
OFF
command
of
the
CPU
.
It
ca
n
be
reset
whe
n the BFI
is
set
high.
T
he
BFa
Is
at
a l
ow
level when
the
BF
flip·flop
is
active
and
at
a high level
whe
n n
ot
active.
The
contents
of
the
BF flip-flop are
protected
(1$ long as
VGG
is
in supplV.
Because
VGG
is VCC in t he
PC
·
1600,
this
function
is
not
used and VCC
is
used
for
an
input.
Power
supply (system's VCC input).
See
Pin No.4.
Op
code
fetch signal which appears when
the
CPU fetches
the
OP
code.
OPF
Is
the
signal
that
Is
i$$ued onlv
when
the
Operation
code
is
fetched
and
is
n
ot
there·
f
ore
issued in fetching
the
add
ress data, immedi
ate
data,
and
the
second
byte
of a 2-step
command.
.os
, ,
A~D15
' i
X.
_____
,...
: C
, , -
MEO.
j
..........
~
OPF
W ' \ :
.
Wr
i
ta
•
...;
___
Op
code
__
_ :
:--
cycle f
li
tch
Bus ackoowledge signal.
When BRQ
is
set
at
a h
ig
h level,
the
CPU issues a high BAK
state
in response
to
it.
When BAK
is
at a high l
ewl,
the CPU sets the addrll$s bus
(ADO
-
A015),
date
bus
(00-D7),
MEO,
MEl,
R/W,
and
aD
in high
impedance.
Power
supplV (system's VCC Input).
-
24
-
I