Service manual
-
PC
-
l600
9,
LSI
pin descriptions
•
SC7852 (main
CPU
1)
•
LH5803 (main
CPU
2)
•
LU
578
13P (sub
CP
U)
•
LR38041
(ga
te array)
•
TC8576F (UAAl)
9-1, Main CPU 2 (SC7852) pin description
Pin
Symbol
InlOut
Active
No.
level
95-
KiNO-Ki'lii7
"0
Low
1
00-2
3
LHWAIT
A"
High
4
.OS
'0
JlJ
5
PT
,,",
,
PU
,,",
7
PVOUT
,,",
S
PVIN
•
'0
9
WR
In
lOut
Low
10----25
A15-AO
"'I
n/Out
26-33
087-080
In/Out
34
l
ORa
"'ln
/Out
35
MREa
.. I
nlOut
36
RO
In
lOut
37 WAIT
• '0
High
38
LH
ASO
,,",
Function
(ll
Internallv pulled
up
to
vee
by
the
resistor (2ooK -
SOOOK).
(2)
T input ·
low
{normal model keyboard input.
A
key
in Ihe l
ow
input
line
Is
pressed.
(3)
T
input
·
High
(emulation
mode),
Used for connection of
the
Z..aO
ICE.
Wait
output
to
the
lH
·5803.
The
signal goes
high
in
onll
of
the
following:
0)
When
the
WAI
T
input
is
at
a high
I,wl.
(21
When
the
LH·5803
8C(:lI$$es
"ooH
or
8000H-FFFFH
of
the
ME'
$pllce,
it
goes
high for one
cycle
time
10
insert
one
wail
.
(31
When
the
Z-80;
s
running
with
the
LH·
5803
8t
halt.
LH
·58
03
basic
clock
(t.3MHz)
.
This clock is used for
the
sync
signal
of
tile
internal
LH
·58
1 0
corresponding
port
and
generation
of
the
LCD CLOCK
(2l7KH~).
Memory bank. signal.
Memory bank. signal.
Memory
bank. signal.
LH
-5803's
PV
signal
input
.
As
PV
is k.ept
in
the
flouting
state
when
the
Z-80
is
operating,
it is internally pulled
down
by
th&
resistor.
(11
Wh&n
th
&
Z-80
is
in
operation,
the
Z-80's
WR
is a
direct
output
on
this line.
(2)
Wh&n
the
LH
-
5803
is in op&r.nion, it
becomes
an
input
to
enab
le
R/W
for
the
LH-5803.
(11
When
the
Z-80
is
in
operation,
th&
Z-80
addre
ss bus is
an
output
on
this line.
(2)
Wh&n
the
LH
-5803
il
in
operation,
the
LH·5803
address
bus
is an
input
on
this line.
Data
bus.
(11
When
the
Z-80
is in
operation,
the
Z-80
l
ORa
is
an
output
o n
this
line.
(21
When
the
LH
-58
03
is
in
operation,
the
LH
-5803
ME'
is
an
input
on
this line.
(11
When
th~
Z-80 is in
operation,
the
Z·ao
MREa
is
an
output
on
this
line.
(21
When
the
LH-5803 is in
operation,
the
LH-5803
MEO
is
an
input
on
this
line.
(11
When
the
Z·80
is in
operation,
the
Z-80
RO
is
an
output
on
this line.
121
When
the
LH-5803
is
in
operation,
the
LH-
5803
00
is
an
input
on
this line.
WA
IT
input
to
the
Z-80
and
LH-5803.
Pulled
down
internally
by
a resistor.
Among
the
RAMs
(the
bank.
of
the
spaces
COOOH-FFFFH)
connected
to
the
RAM3,
it is an
input
to
the
addrMs
A9
of
the
RAM
of
EOOOH- F
FFFH
(the
side A1
3A
is
Input
to
CEl
I.
111
When
the
Z-80
is in
operetion,
"L
H
A90
·
AS"
is
esteblished.
121
Except
that
"LHA90
·
high"
is
established
when
the
LH-
5803
accesses
7400
H-
744FH
and
7500
H
-754F
H.
In
other
words,
when
the
LH·5803
tries
to
access
7400
H
-744FH
a
nd
7500H-
754FH,
it acttJally afXlmes
7600H-764FH
end
7700H-774FH.
-
20
-
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