Service manual
-
PC
-
l600
® After the system reset has been cleared, the Z-80 starts
operation within
10
mi
croseconds
and
the Z-80 begins
to
read
the contents
of
the address
OOOOH
.
(MREQ
issued)
® Now, the Z-80 starts to
su
pply clock pulse
to
the
HD61203
LCD
driver
(217KHz
on
the
eKO)
to
activate
th
e
LCD
.
• The
LCD
vol
tage VeE is activated
at
the same time
the system
is
turned
on.
• Supply lIoltage VOD
on
the RS·232C high
level
side
will
be issued only when PAlM is
at
a high state.
But.
VOD
is
not
supplied during power-on because
PRIM
is
at a low le
ve
l
then.
• A high ELH state indicates that
the
Z·80
is
started
at
the time of system reset. The LH·5803 stays
reset (ASTO- High).
7-3. Reset ope
ra
tion
7
·3
-1
. Reset by the ALL
RE
S
eT
swi
tch on the back
of
the
PC
·1
600
When
the
ALL
RESET switch
is
pressed, it causes the
subcontroller input ACL
to
go
high . With this, the sub-
controller takes the following action by means
of
the
hardware.
(1) All input and
output
lines, including
P3
-
PO
, are
se
t
in
the
input mod
e.
VO<
1'3 -
BFa
P2-
SLCT
PI
-
SLCI
1'0 - RSTIN
RESETSW
ACL.S0341C
ACL
·LU578I3P
j
$W'
Id!
--I
d!!>,..-!
--.J '
~--~-----------
....:
, P3 _ PO ;....
",
t ume '!foll
IS
.y.tem-On
In
Iht
Ifll>Ul
modo
(80
micrOHlCondsl
<D
Regardless
whether
the system
is
turned
on
or off,
P3-PO
are
set
in
the
input mode
and
are kept
in
the
floating
co
ndition while
the
reset is applied
to
the
subcontroller,
P3
is
pulled up with the resistor.
P2
is
pulled down with the resist
or
.
P1
is
pulled up with the resistor.
PO
is
pulled
dow
n with the resistor.
While P
2-PO
are pulled down towards the non·act
ive
direction, P3
is
pulled up towards
the
systel1l-Qff. So,
th
e system's power supply
is
turned off in those states.
However, the power
is
supplied
to
the
system while the
RESET switch
is
in
depression.
7-3-2. Reset by the
RE
SET switch on t he back of t he
CE-1600P
When the RESET switch
on
the back
of
the
CE
-1600P
is
pressed,
KL
and Z15 of the subcontroller
go
high . When
this pulse width continues for more than
300
micro·
seconds,
the
subcontroller proceeds in the same way
as
the
system power-on procedure so
that
a reset
is
applied
to
the system.
7-3
·3. Difference from ALL RESET
The subcontroller interrogates
the
state
of
the BREAK/
ON
key
at
7·3·' and 7·3·2 above in the following manner.
(1)
If
the BREAK/ON key is depressed,
the
all reset
is
assumed and
all
internals are intialized.
(2) If
the
BREAK/ON key is
not
depressed,
the
reset
is
assumed - the procedure
to
turn
the
system on from
the system-off state.
The
internals are
not
initialized
in
this case.
It
is
possible
to
return reset from a
ll
reset
by
a request
from
the
main
CPU,
the
Z-BO
asks the su bcontroller
for
the
cause when
the
reset
is
applied, Processing
differs depending
on
the cause,
I n the case
of
all
reset ... Clears
all
memory contents.
In
the case
of
reset ... Retains
all
memory contents,
7
-4.
LCD block
7-4-1. Gene r, 1
The
LCD
is 1/64
duty
and consists of
156
x
32
dots and
has 16 symbols.
Y64I1C3)
I
(I
V)
=
'"
r
1111
(111)
r==
XU
- X64
Y
I
-Y
6~
Y
I
~
64
(iC31
YI
- Y28
Y'
- Y64I1C21
The
32
vertic
al
dots comprise
the
following:
(1)
Xl-X32
of
the IC2 LCD driver
outputs
take
care
of
64
dots
from the left.
(2) Xl
-X3
2
of
the
IGJ
LCD
driver
outputs
take
care of
65
- 12B dots,
(3)
X33-X64
of
the
1C2
LCD driver
outputs
take
ca
re
of
1
29-156
dots
in
conjunction with
Y1-Y2B.
(4)
X49-X64
take care of 16 symbol
dots
in
conjunction
with IC3
Y64.
7-4·2.
Operat
i
on
(1) The LCD driving basic clock (217KHz) supplied from
CKO
of
the SC7852
is
connected
to
the
LCD
common
driver. Without this signal, the
LCD
w
ill
burn
out
when
a
DC
voltage
is
applied
to
the L
CD.
This signal
is
issued
only
during the system-on time
which appears immediately after the clearing
of
the
reset. As it
is
in
a low state during
the
reset, a
DC
voltage
is
added
to
the
LCD
during
that
period,
-
12
-
.
...
.
..................
........................
..............................................
....................
.!.