User`s guide

A-8 Intel
®
StrongARM
®
SA-1110 Microprocessor Development Board User’s Guide
CPLD Code
SA_VCLK pin 75;
SA_ENAB pin 76;
ENAB1 node ISTYPE ’reg_d’ ;
ENAB2 node ISTYPE ’reg_d’ ;
TV_CLK pin 49;
X1 node ISTYPE ’reg_d’ ;
X2 node ISTYPE ’reg_d’ ;
LCD_SPS pin 100;
LCD_CLS pin 99;
LCD_LP pin 98;
LCD_SPL pin 97;
LCD_LBR pin 6;
LCD_SPR pin 14;
LCD_UBL pin 85;
REV pin 12;
LCD_PS pin 5;
LCD_CLK pin 16;
LCD_MODE pin 83;
CLK_GATE node ISTYPE ’reg_d’ ;
LCD16DATA pin 77;
LCD_PWR_ON pin 78;
MODE3..MODE0 node ISTYPE ’reg_d’ ;
MODE = [MODE3, MODE2, MODE1, MODE0];
mode0= ^h00;"Idle
mode1= ^h01;"
mode2= ^h02;"
mode3= ^h03;"
mode4= ^h04;"
mode5= ^h05;"
mode6= ^h06;"
mode7= ^h07;"
mode8= ^h08;"
mode9= ^h09;"
mode10= ^h0A;"
mode11= ^h0B;"
mode12= ^h0C;"
mode13= ^h0D;"
mode14= ^h0E;"
mode15= ^h0F;"
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"Other signals
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SYS_CLK pin 79; "GPIO_27 3.68MHz
UART3_CLK pin 32; "UART3 clock to SA1110