User`s guide

Intel
®
StrongARM
®
SA-1110 Microprocessor Development Board User’s Guide 4-19
Hardware Considerations
4.8 SMBus
The SMBus interface is a two-wire serial protocol requiring open-collector drivers that allow the
“wire or” of data on the SMBus. The SMBus SDA (data) and SCL (clock) have pull-up resistors to
VDD such that an un-driven SMBus pin will be high (one). The GPIO pins on the SA-1110
Development Module are three-state drivers that have programmable control of direction and data
as well as interrupt generation from either or both edges of a signal. To use the GPIO pins with the
SMBus requires the use of the GPIO direction control bits for two of the GPIO pins as SMBus data
bits.
The GPIO GPCR data register bits for both bits assigned to the SMBus are always cleared to zero.
To drive a low (zero) onto the SMBus SDA or SCL lines the direction bit is set to 1, which drives
the zero data on to the SMBus pin. To drive a one, the GPDR bit for the SMBus pin is set to zero,
which reconfigures the pin as an input and turns off the three-state driver allowing the pull-up on
the SMBus to pull the SMBus line high to a one. The value of the SMBus pins may be read at any
time through the GPLR. For more information about the GPCR, GPDR, and GPLR registers, see
the Intel
®
StrongARM
®
SA-1110 Microprocessor Advanced Developer’s Manual.
The SMBus protocol can be implemented in SA-1110 software with the assistance of interrupt
driven, system timed, programmed I/O. The system timer establishes the SMBus clock rate as well
as avoiding polled PIO of the SMBus GPIO pins. This strategy allows direct connection of two
GPIO pins to the two-wire SMBus with no external glue logic and a minimum of MIPS.
The SMBus is provided on the battery connector to support smart battery packs.
4.9 Serial Ports
The SA-1110 Development Board provides a RS232 interface connected to the SA-1110 serial
port 1. A custom 14-pin header made by FCI is used to allow an external connection to the RS232
port and the POTS signals. This header is similar to the serial adapter headers and the cables used
in cell phones. This communications port may be used for the debug serial port or as an application
communications port. This port provides RTS, CTS, DTR and DSR modem signals to support a
serial IO port PC synchronous application.
A Maxim MAX3244* RS232 transceiver is used to manage the level conversion and line interface.
This device has a power saving automatic shutdown that powers down the chip if no valid RS232
levels are detected. The component may also be forced off by RS232En, which is bit 12 in the
Board Control Register. When off, the CMOS receiver signals are three-stated allowing this serial
port to be shared with the SA-1111 Development Module.
The SA-1111 Development Module provides a standard 5x2 0.1” header for the SA-1110 serial
port 1. This port is used for system debugging and firmware development. When the SA-1111
Development Module is attached, the SA-1110 Development Board shuts down its MAX3244
RS232 transceiver to avoid conflict with the SA-1111 Development Module RS232 transceiver.
The SA-1110 Development Module’s RS232 transceiver may be forced off by RS232En. A second
port on the SA-1111 Development Module that is connected to the SA-1110 serial port 3, is
provided via a nine-pin RS232 port connector on the board. This port may be used for debug
messages from the development environment.