User`s guide

Intel
®
StrongARM
®
SA-1110 Microprocessor Development Board User’s Guide 4-15
Hardware Considerations
Note: The BSR is updated after each read to the BSR—to capture the present value of the BSR, two
consecutive read operations are required.
4.5 System Reset
A MAX811 device is used to sense the 3.3 V rail and generate a reset signal called RESET_IN. A
manual reset switch also allows warm reset and system booting. The MAX811 component releases
the system reset signal when the 3.3 V rail is above 3.08 V.
Three subsystems in the SA-1110 Development Platform have a programmable soft reset control.
The SA-1110 Development Board provides the following reset controls:
• SA-1110 Compact Flash Reset (when Graphics and SA-1111 Development Modules are not
present)
• GFX_Reset
• UCB1300 and UDA1341 Codec_Reset (SA-1110 Development Board only)
The application must clear the reset on any subsystem that is to be used or initialized. The reset
controls are not affected by RESET_IN.
4.6 System Displays
This section describes the LED and LCD display topics on the SA-1110 Development Board.
Table 4-7. 32-Bit Register Table
Physical Address 32-Bit Register SA-1110 Evaluation Board
Bit
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9 8 7 6 5 4 3 2 1 0
Rad_RI
Rad_DCD
Rad_DSR
Rad_CTS
COM_DSR
COM_CTS
COM_DCD
RS232_Valid
Reserved
Reset X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X
Bits Name Description
23:0 Reserved —
24
RS232_
Valid
MAX3244 RS232 transceiver detects a valid RS232 level
25 COM_DCD COM port Carrier Detect
a
a. Not implemented in Phase 4, always reads 0.
26 COM_CTS COM port Clear To Send
27 COM_DSR COM port Data Set Ready
28 Rad_CTS Radio port Clear To Send
29 Rad_DSR Radio port Data Set Ready
30 Rad_DCD Radio port Carrier Detect
31 Rad_RI Radio port Ring Indicator