User`s guide

Intel
®
StrongARM
®
SA-1110 Microprocessor Development Board User’s Guide 4-3
Hardware Considerations
4.2.3 Main SDRAM Interface
The SA-1110 Development Board provides support for 64 Mbit, 128 Mbit or 256 Mbit SDRAMs.
The 54 pin TSOP footprint supports a wide variety of SDRAM vendors and densities. The system
partitioning is designed to minimize the loading and etch length on the SA-1110 pin bus. This
permits the system to run up to 103 MHz SDRAM using SA-1110 CoreClk/2 and 125 MHz
SDRAM components. Using two 256 Mb 16 Mx16 SDRAMs provides a main memory load of
64 MBytes. The SA-1110 Development Board is configured with 128 Mb SDRAMs for a
32 MByte memory load.
4.2.4 Expansion Flash Memory
The SA-1111 Development Module flash bank is populated with 128 Mbit socketed fast page mode
3V StrataFlash memory devices. These devices allow 32 Mbyte flash banks.
Switch component SW2, switch 8 on the SA-1111 Evaluation Module allows selection of either the
main flash bank on the SA-1110 Development Board or the expansion flash bank on the SA-1111
Development Module as the boot bank. For more information on the effects of SW2, see the Intel
®
StrongARM
®
SA-1111 Companion Chip Development Board User’s Guide.
4.2.5 Expansion SDRAM Interface
The SA-1111 Development Module provides support for 64 Mbit, 128 Mbit or 256 Mbit SDRAMs.
The 54 pin TSOP footprint supports a wide variety of SDRAM types and sizes. The SA-1111
Development Module’s SDRAMs are buffered from the SA-1110 CPU and must run on a SA-1110
CoreClk/4 permitting a maximum SDRAM clock speed of 51.5 MHz for this SDRAM bank. Using
two 256 Mb 16Mx16 SDRAMs provides a expansion memory load of 64 Mbytes. The SA-1111
Development Module is initially configured with 128 Mb SDRAMs for a 32 Mbyte memory load.
4.2.6 Compact Flash
The SA-1110 Development Board supports a single type II CF socket. The SA-1110 Development
Board CF slot uses the same interface signals required by the SA-1111 Development Module and
graphics accelerator boards, therefore the CF socket on the SA-1110 Development Board only
functions when there are no daughter boards present.
Caution: Do not plug a CF card plugged into the SA-1110 Development Board CF socket when the
SA-1111 Development or graphics boards are present or it will crash the system and may damage
the SA-1111 component, the graphics accelerator device or SA-1110 Development Board’s
transceiver component. The buffer and transceiver chips on the SA-1110 Development Board that
normally drive the CF socket are reconfigured to become the system buffers and transceivers that
are used to isolate the SA-1111 Development Module and graphics boards from the SA-1110
Development Board when the daughter boards are attached.
E11, which is shown on sheet 4 of 12 on the Intel
®
StrongARM
®
SA-1110 Development Board
Schematics, is a CPLD that controls the transceivers and some of the CF support signals. In
addition, GPIO bits 5:4 control the flash size, as shown in Table 4-5. The SA-1110 GPIO pins
GPIO 21, GPIO 22, GPIO 24 and GPIO 25 serve dual functions in the SA-1110 Development
Board CF design. When the SA-1111 Development Module is attached, GPIO 22 GPIO 21 are
configured to be the GPIO alternate function bus DMA control signals nMBREQ and nMBGNT
while GPIO 24 and GPIO 25 are the graphics and SA-1111 interrupt inputs. When the SA-1111