User's Manual

Smart Machine Smart Decision

SIM5360A_User_Manual_V1.03 2014-07-03

of PCM_CLK

T(suauxdin)

AUX_PCM_IN setup time before falling edge

of AUX_PCM_CLK

70 – – ns

T(hauxdin)

AUX_PCM_IN hold time after falling edge of

AUX_PCM_CLK

20 – – ns

T(pauxdout)

Delay from AUX_PCM_CLK rising to

AUX_PCM_OUT valid

– – 50 ns

*Note: T(auxclk) = 1/(128 KHz).

Primary PCM (2048 KHz PCM clock)

SIM5360A also supports 2.048 MHz PCM data and sync timing for

-law codec. This is called the

primary PCM interface. User can use AT command to take the mode you want as discussed above.

Figure 31: Synchrony timing

Figure 32: EXT CODEC to MODULE timing