User's Manual

Smart Machine Smart Decision
SIM5320ALD_User Manual_V1.01 2014-08-20
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Figure 35: MODULE to EXT CODEC timing
Table 30: Timing parameters
Parameter Description Min Typ Max Unit
T(sync) PCM_SYNC cycle time – 125 – μs
T(synch) PCM_SYNC high time 400 500 – ns
T(syncl) PCM_SYNC low time – 124.5 – μs
T(clk) PCM_CLK cycle time – 488 – ns
T(clkh) PCM_CLK high time – 244 – ns
T(clkl) PCM_CLK low time – 244 – ns
T(susync)
PCM_SYNC setup time high before falling edge of
PCM_CLK
60 – – ns
T(hsync)
PCM_SYNC hold time after falling edge of
PCM_CLK
60 – – ns
T(sudin)
PCM_DIN setup time before falling edge of
PCM_CLK
50 – – ns
T(hdin)
PCM_DIN hold time after falling edge of
PCM_CLK
10 – – ns
T(pdout) Delay from PCM_CLK rising to PCM_DOUT valid – – 350 ns
T(zdout)
Delay from PCM_CLK falling to PCM_DOUT
HIGH-Z
– 160 – ns
Note: SIM5320 can transmit PCM data by USB except for PCM interface. Please refer to document [22] for more
information of PCM Application Note.
3.10 Multi-functional interface
SIM5320ALD merges functions for various applications. It can enrich users’ design and lower the cost of
users’ hardware.