Installation Instructions

SIM5216A _HD_V1.02 Hardware Design
SIM5216A _HD_V1.02 26.08.2010
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Figure 31：PRIM_PCM_SYNC timing
Figure 32：
EXT_CODEC to SIM5216A timing
Figure 33：SIM5216A to EXT_CODEC timing
Table 32 : Primary PCM mode timing parameters
Parameter Description Min Typical Max Unit Note
T(sync) PCM_SYNC cycle time – 125 – μs
T(synch) PCM_SYNC high time 400 500 – ns
T(syncl) PCM_SYNC low time – 124.5 – μs
T(clk) PCM_CLK cycle time – 488 – ns
T(clkh) PCM_CLK high time – 244 – ns
T(clkl) PCM_CLK low time – 244 – ns
T(susync) PCM_SYNC setup time high before falling edge
of PCM_CLK
60 – – ns
T(hsync) PCM_SYNC hold time after falling edge of
PCM_CLK
60 – – ns
T(sudin) PCM_DIN setup time before falling edge of
PCM_CLK
50 – –
ns