Installation Instructions

SIM5216A _HD_V1.02 Hardware Design
SIM5216A _HD_V1.02 26.08.2010
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Figure 30：SIM5216A to EXT_CODEC timing
Table 31 : Auxiliary PCM mode timing parameters
Parameter Description Min Typical Max Unit Note
T(auxsync) AUX_PCM_SYNC cycle time – 125 - μs
T(auxsynch) AUX_PCM_SYNC high time 62.4 62.5 - μs
T(auxsyncl) AUX_PCM_SYNC low time 62.4 62.5 - μs
T(auxclk) AUX_PCM_CLK cycle time - 7.8 – μs *
T(auxclkh) AUX_PCM_CLK high time 3.8 3.9 – μs
T(auxclkl) AUX_PCM_CLK low time 3.8 3.9 – μs
T(suauxsync) AUX_PCM_SYNC setup time high
before falling edge of PCM_CLK
1.95 – – μs
T(hauxsync) AUX_PCM SYNC hold time after falling
edge of PCM_CLK
1.95 – – μs
T(suauxdin) AUX_PCM_DIN setup time before
falling edge of AUX_PCM_CLK
70 – – ns
T(hauxdin) AUX_PCM_DIN hold time after falling
edge of AUX_PCM_CLK
20 – – ns
T(pauxdout) Delay from AUX_PCM_CLK rising to
AUX_PCM_DOUT valid
– – 50 ns
*Note: t(auxclk) = 1/(128 kHz).
3.18.2 Primary PCM (2048 kHz PCM clock)
The aux codec port also supports 2.048 MHz PCM data and sync timing for υ-law codec that
matches the sync timing — this is called the primary PCM interface (or just PCM interface).
You can use AT+CPCM command to change the mode you want.