Data Sheet

Table Of Contents

EMC3380 Series Wireless Module Data Manual

▪ Support DMA for data transmission and reception

▪ Support bus arbitration mechanism to realize the communication capability of multi-master equipment

▪ Wake up from device address matching to achieve low power consumption

▪ Software configurable parameters: SDA hold time, slave device address, etc.

▪ Programmable digital filters for SDA and SCL signals for filtering noise on signal lines

▪ Can use the USI interface to build another I2C interface, supporting 400Kbps high-speed mode

Timer

Basic timers (HS_TIM0 ~ HS_TIM3, LP_TIM0 ~ LP_TIM3)

▪ Clock source: 32KHz, precision: 32 bits, counting mode: up counting

▪ Support interrupt trigger, wake up in sleep mode

PWM timer (HS_TIM5, LP_TIM5)

▪ Channel: HS_TIM5 x 11 and LP_TIM5 x 6

▪ Clock source: XTAL, precision: 16 bits, counting mode: up counting, frequency division: 8 bits

▪ 2 x input capture pins

▪ LP_TIM5 can work in low power mode

Pulse timer (HS_TIM4, LP_TIM4)

▪ Channel: HS_TIM5 x 11 and LP_TIM5 x 6

▪ Clock source: XTAL, precision: 16 bits, counting mode: up counting, frequency division: 8 bits

▪ Single pulse mode, selectable polarity in PWM mode

▪ 2 x input capture pins, which can generate interrupts

Real-time clock RTC

▪ Independent BCD counter

▪ Day / hour / minute / second, 12/24 hour clock

▪ Software programmable clock compensation

▪ An alarm that can be triggered by any combination of time domains and generates interrupts

▪ Digital calibration circuit

▪ Register write protection

Human-Computer Interface

Matrix keyboard

▪ 10 IO ports, support up to 7 x 3, 5 x 5 matrix keyboard scanning

▪ Number of configurable keyboard rows and columns

▪ Configurable scan clock, scan interval and release time

▪ Support interrupt trigger

▪ Provide 12-bit and 16-depth FIFO to save the key press and release events

▪ Supports low power loss, the key time can wake the CPU from low power mode