Data Sheet

Table Of Contents
EMC328x Series Wireless Module Data Manual
Copyright of Shanghai MXCHIP Information Technology Co., Ltd.
5
SPI
Support Motorola SPI serial data transmission
Support master-slave mode
Provide 1 SPI interface
SPI1 (Normal speed): Configurable in master mode with clocks up to 25MHz
Support DMA transmission
Configurable independent interrupt
FIFO Depth: Receive and transmit FIFO queues with 64 words depth, 16 bits per word.
Hardware/software slave device selection function: You can use special hardware to select the
pin from the device chip or use software to control the GPIO mode as the chip select signal of
the SPI slave device.
Programmable features:
Clock frequency: Dynamically control the bit rate of data transmission when set to master mode
The size of each transmitted data (4 to 16 bits)
Clock polarity and phase
When setting to receive serial data in master mode, you can set the delay time of sampling to
achieve higher serial bit rate.
UART
Supported UART formats: 1 start bit, 7/8 data bits, 0/1 parity bits and 1/2 stop bits
Support hardware flow control
Support for interrupt control
Support IrDA
Support loopback mode for testing
Support TX, RX uses different clocks
Tx channel can use the baud rate generator with fractional number to generate accurate clock
Rx channel supports low power mode
Monitor and eliminate baud rate error and drift on the Rx channel
Support DMA transmission
IR (Infra Ray)
Support carrier frequency range: 25KHz ~ 500KHz, duty cycle: 1/2 ~ 1/5
Support infrared diode input, support infrared receiver module input
32*4 bytes Tx FIFO, 32*4 bytes Rx FIFO
One wire (SGPIO)
Single-wire communication interface for secure encryption chip