User's Manual

EH-MC30
Ehong
®
Professional Bluetooth Solutions Provider page 11 of 17
Figure 5： SCL/SDA timing
Symbol
Description
Standard
Fast
Uni
ts
Test
level
Min.
Max.
Min.
Max.
f
SCL
SCL clock frequency.
100
400
kHz
1
t
HD_STA
Hold time for START and repeated START condition.
5200
1300
ns
1
t
SU_DAT
Data setup time before positive edge on SCL
300
300
ns
1
t
HD_DAT
Data hold time after negative edge on SCL.
300
300
ns
1
t
SU_STO
Setup time from SCL goes high to STOP condition.
5200
1300
ns
1
t
BUF
Bus free time between STOP and START conditions.
4700
1300
ns
1
Figure 6： TWI timing parameters
Note: Strong pull is sufficient for I²C on all PIO pads.
6.7. SPI Master/Slave
Symbol
Description
Min.
Typ.
Max.
Units
Test level
I
GPIOTE,IN
Run current with 1 or more GPIOTE
active channels in Input mode.
22
μA
1
I
GPIOTE,OUT
Run current with 1 or more GPIOTE
active channels in Output mode.
0.1
μA
1
I
GPIOTE,IDLE
Run current when all channels are in
Idle mode. PORT event can be
generated with a delay of up to
t
1V2
0.1
μA
1
Figure 7：SPI specifications