User`s guide

20 007-4274-001
2: Baseboard Description
Each S.E.C. cartridge connects to the baseboard through a 330-pin SC330.1 compliant
edge connector. A retention module attached to the baseboard secures the cartridge.
Depending on configuration, the system supports one to four processors.
The processor external interface is multiprocessor (MP) ready and operates at 100 MHz.
The processor contains a local Advanced Configuration and Power Interface (APIC) unit
for interrupt handling in multiprocessor (MP) and uniprocessor (UP) environments.
The L2 cache is located on the substrate of the S.E.C. cartridge. The cache:
• Is offered in 1 MB and 2 MB configurations
• Has Error Correcting Code (ECC)
• Operates at the full core clock rate
Memory
Main memory resides on an add-in board, called a memory module. The memory
module contains slots for 16 DIMMs, each of which must be at least 64 MB, and is
attached to the baseboard through a 330-pin connector, called the Memory Expansion
Card Connector (MECC). The memory module supports PC-100 compliant registered
ECC SDRAM memory modules. The ECC used for the memory module is capable of
correcting single-bit errors (SBEs) and detecting 100 percent of double-bit errors over one
code word. Nibble error detection is also provided.
System memory begins at address 0 and is continuous (flat addressing) up to the
maximum amount of DRAM installed (exception: system memory is non contiguous in
the ranges defined as memory holes using configuration registers). The system supports
both base (conventional) and extended memory.
• Base memory is located at addresses 00000h to 9FFFFh (the first 1 MB).
• Extended memory begins at address 0100000h (1 MB) and extends to 3FFFFFFFFh
(16 GB), which is the limit of supported addressable memory. The top of physical
memory is a maximum of 16 GB (to 3FFFFFFFFh).
Memory amounts from 256 MB to 16 GB of DIMM are supported, with a 64/72-bit
four-way-interleaved pathway to main memory, which is also located on the module.
Therefore, data transfers between MADPs and DIMMs is in four-way interleave fashion.
Each of the four DIMMs must be populated in a bank. The 16 slots are divided into four
banks of four slots each. They are labeled A through D. Bank A contains DIMM sockets