Specifications

SMARTUNER MANUAL 41
SGC Inc. SGC Building, 13737 S.E. 26th St. Bellevue, WA. 98005 USA
© Nov2000 SGC, Inc. P.O. Box 3526, 98009 Fax: [phone] Tel: [phone]
E-Mail: [e-mail] Web Site: www.sgcworld.com
network. Similarly, a low line impedance will result in more output from the current sensor,
resulting in a net negative output voltage from the summing network which is shifted to a 0 to
5v range, then fed to processor's A to D converter ports, and used within microcontroller.
7.4 VSWR Detector
A directional coupler is made up of a current transformer T3 and a voltage transformer T1, in
conjunction with termination resistors R31 and R32. The coupler is inserted in the 50-ohm
transmission line between the input connector and the tuning network. The forward power is
measured across termination R32 and reflected power is measured across termination R31.
Diode D4 generates a positive DC voltage proportional to forward power and D9 generates a
positive DC voltage proportional to reflected power. The forward DC output is fed to a voltage
divider consisting of R58 and R48. These voltages are input to the RF power detector and to an
A to D converter port of the processor. The reflected DC output passes through a voltage
divider consisting of R53 and R54, and then it also goes to an A to D converter port of the
processor.
7.5 Phase Detector
A phase detector is formed by T2, A1, and their associated components. This detector
indicates the state of any reactance associated with the antenna coupler as noted from the
generator. A line current sample is compared in phase with a voltage sample in a double
balanced mixer. The output of the phase detector A1 is shifted to a 0 to 5v range, then fed to
the processor’s A to D converter ports and used within the microcontroller.
7.6 Central Processing Unit (CPU)
A tune-up algorithm, which is contained in the memory of the microprocessor, actually
implements the antenna matching. It is designed around the MC 68HC711E9 CPU which
features a versatile instruction set, RAM, and EEPROM (memory which is saved after the
coupler is turned off). The antenna coupler relays are controlled by latches U7, U8, and U9,
which receive serial data input directly from the CPU.
During operation, data is transferred into the CPU from the A to D ports and Input Capture
port (measures RF frequency). Basically, the program monitors the status of the input sensors
and—starting from a preset condition—uses a built-in algorithm to achieve a tuned condition.
When the tuning algorithm is complete, the CPU saves the settings in its EEPROM, which is
addressed by the applied RF frequency.
This non-volatile memory table is the basis of the exclusive learning feature of the
SMARTUNER. After it has stored and latched the network status, the CPU waits for RF to
cease transmitting and returns to the Stop mode. When RF is retransmitted, the first step in the
tuning algorithm is to measure the frequency of the signal passing through the coupler. From
the frequency data, the computer then searchers its EEPROM for previously stored data. If