Intel® Server Board S5000PAL/S5000XAL Technical Product Specification Intel order number: D31979-011 Revision 2.
Revision History Intel® Server Board S5000PAL/S5000XAL TPS Revision History Date April 2006 June 2006 Revision Number 1.0 1.1 Modifications First external release. Updated theoretical memory bandwidth performance numbers. Added Platform Control sections. August 2006 1.2 January 2007 1.3 May 2007 1.4 August 2007 October 2007 February 2008 1.5 1.6 1.7 Updated processor support section. Updated Table 44 BMC sensor.
Intel® Server Board S5000PAL/S5000XAL TPS Disclaimers Disclaimers Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document.
Table of Contents Intel® Server Board S5000PAL/S5000XAL TPS Table of Contents 1. Introduction .......................................................................................................................... 1 1.1 Chapter Outline........................................................................................................ 1 1.2 Server Board Use Disclaimer .................................................................................. 1 2. Product Overview............................
Intel® Server Board S5000PAL/S5000XAL TPS Table of Contents 5.7.4 Intel® I/O Expansion Module Connector ................................................................ 44 5.7.5 SATA Connectors .................................................................................................. 45 5.7.6 Serial Port Connectors........................................................................................... 46 5.7.7 Keyboard and Mouse Connector ........................................................
Table of Contents Intel® Server Board S5000PAL/S5000XAL TPS 9.2.5 RRL (Korea)........................................................................................................... 70 9.3 Product Ecology Compliance................................................................................. 71 9.4 Other Markings ...................................................................................................... 72 Appendix A: Integration and Usage Tips............................................
Intel® Server Board S5000PAL/S5000XAL TPS List of Figures List of Figures Figure 1. Server Board Layout...................................................................................................... 3 Figure 2. Components & Connector Location Diagram ................................................................ 5 Figure 3. Light Guided Diagnostic LED Location Diagram ........................................................... 6 Figure 4. Intel® Server Board S5000PAL/S5000XAL ATX I/O Layout .....
List of Tables Intel® Server Board S5000PAL/S5000XAL TPS List of Tables Table 1. I2C Addresses for Memory Module SMB ...................................................................... 16 Table 2. Maximum 8 DIMM System Memory Configuration – x8 Single Rank ........................... 17 Table 3. Maximum 8 DIMM System Memory Configuration – x4 Dual Rank .............................. 17 Table 4. PCI Bus Segment Characteristics..............................................................................
Intel® Server Board S5000PAL/S5000XAL TPS List of Tables Table 43. BMC Sensors.............................................................................................................. 77 Table 44: POST Progress Code LED Example .......................................................................... 91 Table 45. Diagnostic LED POST Code Decoder ........................................................................ 92 Table 46. POST Error Messages and Handling......................................
List of Tables Intel® Server Board S5000PAL/S5000XAL TPS < This page is intentionally left blank. > x Intel order number: D31979-011 Revision 2.
Intel® Server Board S5000PAL/S5000XAL TPS 1. Introduction Introduction This Technical Product Specification (TPS) provides board specific information detailing the features, functionality, and high level architecture of the Intel® Server Board S5000PAL and Intel® Server Board S5000XAL. The Intel® S5000 Series Chipsets Server Board Family Datasheet should also be referenced for more in depth detail of various board sub-systems including chipset, BIOS, System Management, and System Management software.
Product Overview 2. Intel® Server Board S5000PAL/S5000XAL TPS Product Overview The Intel® Server Board S5000PAL and Intel® Server Board S5000XAL are monolithic printed circuit boards with features that were designed to support the high-density 1U and 2U server markets. 2.
Intel® Server Board S5000PAL/S5000XAL TPS 2.2 Product Overview Server Board Layout Figure 1. Server Board Layout Revision 2.
Product Overview Intel® Server Board S5000PAL/S5000XAL TPS 2.2.1 Connector and Component Locations The following figure shows the board layout of the server board. Each connector and major component is identified by a number or letter, and a description is given below the figure. A B C D E F G H I QQ J PP K L OO NN MM LL KK JJ II M N HH GG FF EE O DD CC BB AA P Q Z Y X W V U TS R TP02071 4 Intel order number: D31979-011 Revision 2.
Intel® Server Board S5000PAL/S5000XAL TPS Product Overview A Description BIOS Bank Select Jumper V Description System Fan #2 Header B Intel® ESB-2 IO Controller Hub W CPU Power Connector C IO Module Option Connector X Main Power Connector D POST Code Diagnostic LEDs Y Battery E Intel® Adaptive Slot – Full Height Z Power Supply Management Connector F PCI Express* Riser Slot – Low Profile AA Dual Port USB 2.
Product Overview Intel® Server Board S5000PAL/S5000XAL TPS 2.2.2 Light Guided Diagnostic LED Locations B C A I J K L DM N O P GS Q E RF TP02317 A Description Post Code Diagnostic LEDs E Description CPU Fault LED B System Identification LED – Blue F CPU Fault LED C System Status LED – Green/Amber G 5-Volt Stand-by Present LED D DIMM Fault LEDs Figure 3. Light Guided Diagnostic LED Location Diagram 6 Intel order number: D31979-011 Revision 2.
Intel® Server Board S5000PAL/S5000XAL TPS Product Overview 2.2.3 External I/O Connector Locations The drawing below shows the layout of the rear I/O components for the server board. A B C D E F G H TP02296 A PS/2 Mouse E NIC port 2 (1 Gb) B PS/2 Keyboard F Video C Serial Port B G USB port 1 D NIC port 1 (1 Gb) H USB port 2 Figure 4. Intel® Server Board S5000PAL/S5000XAL ATX I/O Layout Revision 2.
Product Overview Intel® Server Board S5000PAL/S5000XAL TPS 288.29 [11.350] Molex 43202-8927 6026A0027801 196.85 [7.750] 118.11 [4.650] 2 x 124.46 [4.900] 2 x 86.89 [3.421] 82.80 [3.260] 44.89 [1.767] 33.91 [1.335] 2 x 0.00 [0.000] 11.02 [0.434] 11.91 [0.469] 16.76 [0.660] 16.51 [0.650] 2.2.4 Server Board Mechanical Drawings 10.16 [0.400] 2 x 0.00 [0.000] 0.91 [0.036] 15.24 [0.600] 21.59 [0.850] Lotes B2515BB2M 6012A0019603 45.59 [1.795] 2 x 49.35 [1.943] 62.66 [2.467] 67.31 [2.
278.38 [10.960] 280.71 [11.052] 263.14 [10.360] 244.27 [9.617] 224.21 [8.827] 200.13 [7.879] 205.97 [8.109] 175.03 [6.891] 158.80 [6.252] 141.78 [5.582] Product Overview 87.88 [3.460] 94.23 [3.710] 100.58 [3.960] 104.39 [4.110] 106.93 [4.210] 127.20 [5.008] 80.14 [3.155] 56.84 [2.238] 0.00 [0.000] 5.21 [0.205] 9.32 [0.367] 16.51 [0.650] 3 x 13.59 [0.535] 2 x 12.33 [0.485] 12.27 [0.483] 9.07 [0.357] Intel® Server Board S5000PAL/S5000XAL TPS 10.16 [0.400] 5 x 6.99 [0.275] 6.27 [0.247] 2.
288.29 [11.350] 267.51 [10.532] 198.02 [7.796] 207.98 [8.188] H < 11.65 mm [0.459"] Under Rear Panel Tab 96.98 [3.818] 98.88 [3.893] 101.90 [4.012] 109.40 [4.307] 120.85 [4.758] 125.27 [4.932] 129.69 [5.106] 134.62 [5.300] 137.72 [5.422] 0.76 [0.030] H < 30 mm [1.181"] PCI BKT Drop Down 57.89 [2.279] No Components Allowed for Retention Pins 0.00 [0.000] Intel® Server Board S5000PAL/S5000XAL TPS 16.51 [0.650] 13.18 [0.519] 9.27 [0.365] 3.28 [0.129] Product Overview H < 5 mm [0.
Product Overview H < 1.47 mm [0.058"] Typ. No Components or Surface Layer Traces in this Zone. 2 X 5.00 [0.197] 3 X 3.99 [0.157] 10.16 [0.400] 288.29 [11.350] 0.00 [0.000] 3 Ground Pad on Side 2 16.51 [0.650] Intel® Server Board S5000PAL/S5000XAL TPS 3.00 [0.118] 0.00 [0.000] 10.13 [0.399] Ø 29.46 [1.160] Typ. H < 2 mm [0.078] 15.24 [0.600] Typ. Backside Spring Area. No Motherboard Component Placement Allowed. Ø 2.000 [50.8 mm] Typ. 180.34 [7.100] 200.03 [7.875] 0.200" [5.
285.75 [11.250] 0.00 [0.000] 113.13 [4.454] 199.21 [7.843] Intel® Server Board S5000PAL/S5000XAL TPS 16.51 [0.650] Product Overview 10.16 [0.400] 0.00 [0.000] NO Components Allowed for Duct 143.51 [5.650] 2 x 173.99 [6.850] 182.83 [7.198] H < 10.0 mm [0.394"] Under Duct H < 0.8 mm [0.310"] Under VR H < 1.5 mm [0.059"] Under VR 256.54 [10.100] 3 x 274.32 [10.800] 2 x 77.22 [3.040] 125.78 [4.952] 109.86 [4.325] 5.52 [0.217] 4.83 [0.190] 11.69 [0.460] 6.35 [0.250] 298.51 [11.
Intel® Server Board S5000PAL/S5000XAL TPS 3. Functional Architecture Functional Architecture The architecture and design of the Intel® Server Board S5000PAL/S5000XAL is based on the Intel® 5000 Chipset Family. The chipset is designed for systems based on the Dual-Core Intel® Xeon® processor 5000 sequence with system bus speeds of 667 MHz, 1066 MHz, and 1333 MHz.
Functional Architecture 3.1 Intel® Server Board S5000PAL/S5000XAL TPS Intel® 5000P and 5000X Memory Controller Hubs (MCH) This section will describe the general functionality of the memory controller hub as it is implemented on this server board. Depending on the version of the server board in use, it may support either the Intel® 5000P MCH or the Intel® 5000X MCH. Features that are unique to a particular MCH will be so referenced.
Intel® Server Board S5000PAL/S5000XAL TPS 3.1.2.1 Functional Architecture Processor Population Rules When two processors are installed, both must be of identical revision, core voltage, and bus/core speed. Mixed processor steppings are supported. However, the stepping of one processor cannot be greater than one stepping back of the other. When only one processor is installed, it must be in the socket labeled CPU1. The other socket must be empty.
Functional Architecture Intel® Server Board S5000PAL/S5000XAL TPS FB-DIMM channel is 5.3GB/s for DDR2 667 FB-DIMM memory which gives a total read bandwidth of 21GB/s for four FB-DIMM channels. Thus, this provides 10.7 GB/s of write memory bandwidth for four FB-DIMM channels. The total bandwidth is based on read bandwidth thus the total bandwidth is 17 GB/s for 533 and 21.0 GB/s for 667.
Intel® Server Board S5000PAL/S5000XAL TPS 3.1.3.2 Functional Architecture Supported Memory The server board supports up to eight DDR2-533 or DDR2-667 Fully Buffered DIMMs (FBD memory). The following tables show the maximum memory configurations supported using the specified memory technology. Table 2.
Functional Architecture Intel® Server Board S5000PAL/S5000XAL TPS Branch 0 Branch 1 Channel A DIMM_A1 Channel B DIMM_A2 DIMM_B1 DIMM B2 Channel C DIMM C1 DIMM C2 Channel D DIMM D1 Mirroring Possible Sparing Possible DIMM D2 Y (0) Y Y (0) Y Notes: 1. 2. 3. 4. Y (0, 1) Single channel mode is only tested and supported with a 512MB x8 FBDIMM installed in DIMM Slot A1. The supported memory configurations must meet population rules defined above.
Intel® Server Board S5000PAL/S5000XAL TPS 3.1.3.4 Functional Architecture Non-mirrored mode memory upgrades The minimum memory upgrade increment is two DIMMs per branch. The DIMMs must cover the same slot position on both channels. DIMMs pairs must be identical with respect to size, speed, and organization. DIMMs that cover adjacent slot positions do not need to be identical.
Functional Architecture 3.1.3.4.2 Intel® Server Board S5000PAL/S5000XAL TPS DIMM Sparing Mode Memory Configuration The MCH provides DIMM sparing capabilities. Sparing is a RAS feature that involves configuring a DIMM to be placed in reserve so it can be use to replace a DIMM that fails. DIMM sparing occurs within a given bank of memory and is not supported across branches. There are two supported Memory Sparing configurations. 3.1.3.4.2.
Intel® Server Board S5000PAL/S5000XAL TPS Functional Architecture 3.1.3.4.2.2 Dual Branch Mode Sparing Dual branch mode sparing requires that all eight DIMM slots be populated and must comply with the following population rules. DIMM_A1 and DIMM_B1 must be identical in organization, size and speed. DIMM_A2 and DIMM_B2 must be identical in organization, size and speed. DIMM_C1 and DIMM_D1 must be identical in organization, size and speed.
Functional Architecture Intel® Server Board S5000PAL/S5000XAL TPS This section describes the function of most of the listed features as they pertain to this server board. For more detail information, see the Intel® S5000 Series Chipsets Server Board Family Datasheet or the Intel® Enterprise South Bridge-2 External Design Specification (Yellow Cover). 3.2.1 PCI Sub-system The primary I/O buses for the server board are PCI, PCI Express*, and PCI-X*, with six independent PCI bus segments.
Intel® Server Board S5000PAL/S5000XAL TPS 3.2.1.5 Functional Architecture PE4, PE5: Two x4 PCI Express* Bus Segments Two x4 PCI Express* bus segments are directed through the MCH. These PCI Express segments, PE4 and PE5, support one x8 or two x4 PCI Express segments to the low profile riser slot (J5B1). 3.2.1.6 PE6, PE7: Two x4 PCI Express* Bus Segments Two x4 PCI Express* bus segments are directed through the MCH.
Functional Architecture Intel® Server Board S5000PAL/S5000XAL TPS Note: Each PCI slot on the 2U PCI-X* (active) riser card operates on an independent PCI bus. Therefore, using an add-in card that operates below 133MHz will not affect the bus speed of the other PCI slots.
Intel® Server Board S5000PAL/S5000XAL TPS 3.2.2.
Functional Architecture Intel® Server Board S5000PAL/S5000XAL TPS Table 5. Video Modes 2D Mode 3.3.1.
Intel® Server Board S5000PAL/S5000XAL TPS 3.4 Functional Architecture Network Interface Controller (NIC) Network interface support is provided from the built in Dual GbE MAC features of the ESB-2 in conjunction with the Intel® 82563EB compact Physical Layer Transceiver (PHY). Together, they provide the server board with support for dual LAN ports designed for 10/100/1000 Mbps operation. The 82563EB device is based upon proven PHY technology integrated into the Intel® Gigabit Ethernet Controllers.
Functional Architecture Intel® Server Board S5000PAL/S5000XAL TPS stack to enable IPMI remote management over LAN. BMC LAN Channel 1 is assigned the NIC1 MAC address + 2, and BMC LAN Channel 2 is assigned the NIC1 MAC address + 3. 3.5 Super I/O Legacy I/O support is provided by using a National Semiconductor* PC87427 Super I/O device. This chip contains all of the necessary circuitry to support the following functions: 3.5.1.
Intel® Server Board S5000PAL/S5000XAL TPS Functional Architecture J8A3 2 3 4 1-2: DCD to DTR 3-4: DSR to DTR (factory default) TP02303 Pins 1-2 What happens at system reset… Serial port is configured for DCD to DTR 3-4 Serial port is configured for DSR to DTR (default) Figure 16. Serial Port Configuration Jumper Location For server applications that require a DB9 serial connector, an 8-pin RJ45-to-DB9 adapter must be used.
Functional Architecture 3.5.1.4 Intel® Server Board S5000PAL/S5000XAL TPS Wake-up Control The super I/O contains functionality that allows various events to power-on and power-off the system. 3.5.1.5 System Health Support The super I/O provides an interface via GPIOs for BIOS and Server Management Firmware to activate the Diagnostic LEDs, the FRU fault indicator LEDs for processors, DIMMs, fans and the system status LED. Refer to Figure 3.
Intel® Server Board S5000PAL/S5000XAL TPS 4. Platform Management Platform Management The platform management sub-system on the server board is based on the integrated Baseboard Management Controller (BMC) features of the ESB-2. The on board platform management subsystem consists of communication buses, sensors, system BIOS, and server management firmware. The following diagram provides an overview of the Server Management Bus (SMBUS) architecture used on this server board.
Connector/Header Locations and Pin-outs Intel® Server Board S5000PAL/S5000XAL TPS 5. Connector/Header Locations and Pin-outs 5.1 Board Connector Information The following section provides detailed information regarding all connectors, headers and jumpers on the server board. Table 9 lists all connector types available on the board and the corresponding reference designators printed on the silkscreen. Table 9.
Intel® Server Board S5000PAL/S5000XAL TPS 5.2 Connector/Header Locations and Pin-outs Power Connectors The main power supply connection is obtained using an SSI compliant 2x12 pin connector (J3K3). In addition, there are two additional power related connectors; one SSI compliant 2x4 pin power connector (J3K4) providing support for additional 12V, and one SSI compliant 1x5 pin connector (J1K1) providing I2C monitoring of the power supply. The following tables define the connector pin-outs. Table 10.
Connector/Header Locations and Pin-outs 5.3 Intel® Server Board S5000PAL/S5000XAL TPS System Management Headers 5.3.1 Intel® Remote Management Module (RMM) Connector A 120-pin Intel® RMM Connector (J1C5) is included on the server board for sole support of the optional Intel® Remote Management Module. There is no support for third party ASMI cards on this server board.
Intel® Server Board S5000PAL/S5000XAL TPS Connector/Header Locations and Pin-outs Pin 73 Signal Name V_LCDDATA23 Pin 74 Signal Name V_LCDDATA13 75 V_LCDDATA22 76 V_LCDDATA12 77 V_LCDDATA21 78 V_LCDDATA11 79 V_LCDDATA20 80 GND 81 V_LCDDATA19 82 V_LCDCNTL2 83 GND 84 V_DVO_DDC_SDA 85 FM_MAN_LAN_TYPE1 86 V_DVO_DDC_SCL 87 FM_MAN_LAN_TYPE1 88 RST_PS_PWRGD 89 Reserved - NC 90 Reserved - NC 91 Reserved - NC 92 Reserved - NC 93 MII_MDC_RMII_SPARE 94 Reserved - NC 95 MII
Connector/Header Locations and Pin-outs Intel® Server Board S5000PAL/S5000XAL TPS 5.3.3 LCP/AUX IPMB Header Table 15. LPC/AUX IPMB Header Pin-out (J1C2) 1 Pin Signal Name SMB_IPMB_5VSB_DAT Description BMC IMB 5V Standby Data Line 2 GND Ground 3 SMB_IPMB_5VSB_CLK BMC IMB 5V Standby Clock Line 4 P5V_STBY +5V Standby Power 5.3.4 IPMB Header Table 16. IPMB Header Pin-out (J1C3) Pin 5.
Intel® Server Board S5000PAL/S5000XAL TPS Pin Side B PCI Spec Signal 23 PE4_MCH_TXP_C <3..0> 24 PE4_MCH_TXN_C <3..0> Connector/Header Locations and Pin-outs 2 Pin Side A 23 PCI Spec Signal GND 2 24 GND 25 GND 25 PE4_MCH_RXP <3..0> 2 26 GND 26 PE4_MCH_RXN <3..0> 2 27 PE4_MCH_TXP_C <3..0> 3 27 GND 28 PE4_MCH_TXN_C <3..0> 3 28 GND 29 GND 29 PE4_MCH_RXP <3..0> 3 30 P3V3 30 PE4_MCH_RXN <3..0> 3 31 GND GND 32 CLK_100M_LP_PCIE_SLOT2_P 31 32 33 PE5_MCH_TXP_C <3..
Connector/Header Locations and Pin-outs Intel® Server Board S5000PAL/S5000XAL TPS Pin-Side B PCI Spec Signal Pin-Side A 38 PCI Spec Signal 125 HSOn(1) 125 GND 124 GND 124 HSIp(1) 123 GND 123 HSIn(1) 122 HSOp(2) 122 GND 121 HSOn(2) 121 GND 120 GND 120 HSIp(2) 119 GND 119 HSIn(2) 118 HSOp(3) 118 GND 117 HSOn(3) 117 GND 116 GND 116 HSIp(3) 115 GND 115 HSIn(3) 114 HSOp(4) 114 GND 113 HSOn(4) 113 GND 112 GND 112 HSIp(4) 111 GND 111 HSIn(4) 110 HSO
Intel® Server Board S5000PAL/S5000XAL TPS Connector/Header Locations and Pin-outs Pin-Side B PCI Spec Signal Pin-Side A Revision 2.0 PCI Spec Signal 80 CLK1 80 GND 79 Ground 79 GNT2# 78 REQ1# 78 +3.3V 77 +3.3V 77 GNT1# 76 PME2# 76 Ground 75 AD[31] 75 PME1# 74 AD[29] 74 PME3# 73 Ground 73 AD[30] 72 AD[27] 72 +3.3V 71 AD[25] 71 AD[28] 70 +3.3V 70 AD[26] 69 C/BE[3]# 69 Ground 68 AD[23] 68 AD[24] 67 Ground 67 RSVRD 66 AD[21] 66 +3.
Connector/Header Locations and Pin-outs Intel® Server Board S5000PAL/S5000XAL TPS Pin-Side B PCI Spec Signal Pin-Side A 40 PCI Spec Signal 33 +5V 33 +5V 32 Reserved 32 +5V 31 Ground 31 C/BE[7]# 30 C/BE[6]# 30 C/BE[5]# 29 C/BE[4]# 29 Ground 28 Ground 28 PAR64 27 AD[63] 27 AD[62] 26 AD[61] 26 3.3V 25 3.3V 25 AD[60] 24 AD[59] 24 AD[58] 23 AD[57] 23 Ground 22 Ground 22 AD[56] 21 AD[55] 21 AD[54] 20 AD[53] 20 3.
Intel® Server Board S5000PAL/S5000XAL TPS 5.5 Connector/Header Locations and Pin-outs SSI Control Panel Connector The server board provides a 24-pin SSI control panel connector (J3H2) for use with non-Intel chassis. The following table provides the pin-out for this connector. Table 19.
Connector/Header Locations and Pin-outs Intel® Server Board S5000PAL/S5000XAL TPS Pin A20 Signal Name PE1_ESB_RXN_C<0> Pin B20 Signal Name FM_RAID_MODE A21 PE1_ESB_RXP_C<0> B21 GND A22 GND B22 CLK_100M_SRLAKE_N A23 FM_FAN_D_PRSNT1 B23 CLK_100M_SRLAKE_P A24 FM_FAN_D_PRSNT3 B24 GND A25 FM_FAN_D_PRSNT2 B25 SGPIO_DATAOUT1_R A26 GND B26 SGPIO_DATAOUT0_R A27 USB_ESB_P4P B27 SGPIO_LOAD_R A28 USB_ESB_P4N B28 SGPIO_CLOCK_N A29 GND B29 GND A30 USB_ESB_OC_N<4> B30 USB_ESB_P
Intel® Server Board S5000PAL/S5000XAL TPS 5.7 Connector/Header Locations and Pin-outs I/O Connector Pin-out Definition 5.7.1 VGA Connector The following table details the pin-out definition of the VGA connector (J6A1). Table 21.
Connector/Header Locations and Pin-outs Intel® Server Board S5000PAL/S5000XAL TPS 5.7.3 IDE Connector The server board includes an IDE connector to access the single IDE channel from the ESB-2 IO controller hub. The design intent for this connector is to provide IDE support for a single slimline optical drive, such as CDROM or DVD. The connector is not a standard 40-pin IDE connector, instead it has 44 pins providing support for both power and IO signals.
Intel® Server Board S5000PAL/S5000XAL TPS Connector/Header Locations and Pin-outs Table 24.
Connector/Header Locations and Pin-outs Intel® Server Board S5000PAL/S5000XAL TPS 5.7.6 Serial Port Connectors The server board provides one external RJ45 Serial ‘B’ port (J9A2) and one internal 9-pin Serial ‘A’ port header (J1B1). The following tables define the pin-outs for each. Table 26.
Intel® Server Board S5000PAL/S5000XAL TPS Connector/Header Locations and Pin-outs Pin 11 Signal Name MS_CLK_F Description Mouse Clock 12 TP_PS2_12 Test point – keyboard/mouse 13 GND Ground 14 GND Ground 15 GND Ground 16 GND Ground 17 GND Ground 5.7.8 USB 2.0 Connectors The following table details the pin-out of the external USB connectors (J5A1, J6A2) found on the back edge of the server board. Table 29.
Connector/Header Locations and Pin-outs 5.8 Intel® Server Board S5000PAL/S5000XAL TPS Fan Headers The server board incorporates three system fan circuits which support a total of six SSI compliant 4-pin fan connectors. Two fan connectors are designated as processor cooling fans, CPU1 Fan (J9K1) and CPU2 Fan (J5K1). These connectors can support CPU fans that draw a maximum of 1.2 Amps each.
Intel® Server Board S5000PAL/S5000XAL TPS 6. Jumper Block Settings Jumper Block Settings The server board has several 2-pin and 3-pin jumper blocks that can be used to configure, protect, or recover specific features of the server board. Pin 1 on each jumper block is denoted by an “*” or “▼”. 6.1 Recovery Jumper Blocks Table 32.
Jumper Block Settings Intel® Server Board S5000PAL/S5000XAL TPS 6.1.1 CMOS Clear and Password Reset Usage Procedure The CMOS Clear (J1D3) and Password Reset (J1D2) recovery features are designed so that the desired operation can be achieved with minimal system down time. The usage procedure for these two features has changed from previous generation Intel® Server Boards. The following procedure outlines the new usage model. CMOS Clear Procedure: 1. Power down the server; do not remove AC power. 2.
Intel® Server Board S5000PAL/S5000XAL TPS Jumper Block Settings 7. Open the server and move the jumper from the “enabled” position (pins 2-3) to the “disabled” position (pins 1-2). 8. Close the server system and reconnect AC power and power up the server. Note: Normal BMC functionality is disabled with the force BMC update jumper set to the “enabled” position.
Jumper Block Settings Intel® Server Board S5000PAL/S5000XAL TPS 3. Power down the server and unplug the AC power cord. 4. Move the recovery jumper back to the normal position. 5. Plug in the power cord and power on the system. 6. The system will boot from the new BIOS. 52 Intel order number: D31979-011 Revision 2.
Intel® Server Board S5000PAL/S5000XAL TPS 6.3 Jumper Block Settings External RJ45 Serial Port Jumper Block The jumper block J8A3, located directly behind the external RJ45 serial port, is used to configure either a DSR or a DCD signal to the connector. J8A3 2 3 4 1-2: DCD to DTR 3-4: DSR to DTR (factory default) TP02303 Figure 20. External RJ45 Serial Port Configuration Jumper Revision 2.
Light Guided Diagnostics 7. Intel® Server Board S5000PAL/S5000XAL TPS Light Guided Diagnostics The server board has several on-board diagnostic LEDs to assist in troubleshooting board level issues. This section shows where each LED is located and provides a high level usage description. For a more detailed description of what drives the diagnostic LED operation, refer to the Intel® S5000 Series Chipsets Server Board Family Datasheet. 7.
Intel® Server Board S5000PAL/S5000XAL TPS 7.2 Light Guided Diagnostics System ID LED and System Status LED The server board provides LEDs for both System ID and System Status. ID LED Status LED TP02309 Figure 22. System ID LED and System Status LED Locations. The blue “System ID” LED can be illuminated using either of two following mechanisms: By pressing the System ID Button on the system control panel the ID LED will display a solid blue color, until the button is pressed again.
Light Guided Diagnostics Intel® Server Board S5000PAL/S5000XAL TPS The bi-color System Status LED will operate as follows: Color Off Green/ Amber State N/A Alternating Blink Criticality Not ready Not ready Description AC power off Pre DC Power On – 15-20 second BMC Initialization when AC is applied to the server. Control Panel buttons are disabled until BMC initialization is complete. System booted and ready. System degraded Unable to use all of the installed memory (more than one DIMM installed).
Intel® Server Board S5000PAL/S5000XAL TPS 7.3 Light Guided Diagnostics DIMM Fault LEDs The server board provides a memory fault LED for each DIMM slot. The DIMM fault LED is illuminated when the system BIOS disables the specified DIMM after it reaches a specified number of given failures or if specific critical DIMM failures are detected. See the Intel® S5000 Series Chipsets Server Board Family Datasheet for more details. TP02310 Figure 23. DIMM Fault LED Locations 7.
Light Guided Diagnostics 7.5 Intel® Server Board S5000PAL/S5000XAL TPS Post Code Diagnostic LEDs During the system boot process, BIOS executes a number of platform configuration processes, each of which is assigned a specific hex POST code number. As each configuration routine is started, BIOS will display the given POST code to the POST code diagnostic LEDs found on the back edge of the server board.
Intel® Server Board S5000PAL/S5000XAL TPS Power and Environmental Specifications 8. Power and Environmental Specifications 8.1 Intel® Server Board S5000PAL/S5000XAL Design Specifications Operation of the server board at conditions beyond those shown in the following table may cause permanent damage to the system. Exposure to absolute maximum rating conditions for extended periods may affect system reliability.
Power and Environmental Specifications 8.2 Intel® Server Board S5000PAL/S5000XAL TPS Server Board Power Requirements This section provides power supply design guidelines for a system using the Intel® Server Board S5000PAL/S5000XAL, including voltage and current specifications, and power supply on/off sequencing characteristics. The following diagram shows the power distribution implemented on this server board. Figure 26. Power Distribution Block Diagram 8.2.
Intel® Server Board S5000PAL/S5000XAL TPS Power and Environmental Specifications 8.2.2 Power Supply Output Requirements This section is for reference purposes only. Its intent is to provide guidance to system designers for determining a proper power supply for use with this server board. The contents of this section specify the power supply requirements Intel used to develop a power supply for its 1U server platform.
Power and Environmental Specifications Intel® Server Board S5000PAL/S5000XAL TPS 8.2.4 Grounding The grounds of the pins of the power supply output connector provide the power return path. The output connector ground pins shall be connected to safety ground (power supply enclosure). This grounding should be well designed to ensure passing the maximum allowed Common Mode Noise levels. The power supply shall be provided with a reliable protective earth ground.
Intel® Server Board S5000PAL/S5000XAL TPS Power and Environmental Specifications 8.2.8 Dynamic Loading The output voltages shall remain within limits for the step loading and capacitive loading specified in the table below. The load transient repetition rate shall be tested between 50 Hz and 5 kHz at duty cycles ranging from 10%-90%. The load transient repetition rate is only a test specification. The step load may occur anywhere within the MIN load to the MAX load conditions. Table 38.
Power and Environmental Specifications Intel® Server Board S5000PAL/S5000XAL TPS 8.2.12 Ripple/Noise The maximum allowed ripple/noise output of the power supply is defined in the following table. This is measured over a bandwidth of 0Hz to 20MHz at the power supply output connectors. A 10 F tantalum capacitor in parallel with a 0.1 F ceramic capacitor are placed at the point of measurement. Table 40. Ripple and Noise +3.3V 50mVp-p +5V 50mVp-p +12V1/2/3/4 120mVp-p -12V 120mVp-p +5VSB 50mVp-p 8.2.
Intel® Server Board S5000PAL/S5000XAL TPS Power and Environmental Specifications Table 41. Output Voltage Timing Item Tvout_rise Tvout_on Description Output voltage rise time from each main output. All main outputs must be within regulation of each other within this time. All main outputs must leave regulation within this time. Tvout_off 1 MIN 5.0 * 70 1 50 400 MAX UNITS msec msec msec The 5VSB output voltage rise time shall be from 1.0ms to 25.
Power and Environmental Specifications Intel® Server Board S5000PAL/S5000XAL TPS Table 42. Turn On/Off Timing Item Tsb_on_delay Tac_on_delay Tvout_holdup Tpwok_holdup Tpson_on_delay Tpson_pwok Tpwok_on Tpwok_off Tpwok_low Tsb_vout T5VSB_holdup Description Delay from AC being applied to 5VSB being within regulation. Delay from AC being applied to all output voltages being within regulation. Time all output voltages stay within regulation after loss of AC. Measured at 60% of maximum load.
Intel® Server Board S5000PAL/S5000XAL TPS Power and Environmental Specifications 8.2.15 Residual Voltage Immunity in Standby Mode The power supply shall be immune to any residual voltage placed on its outputs (typically a leakage voltage through the system from standby output) up to 500 mV. There shall be no additional heat generated, nor stress of any internal components with this voltage applied to any individual output, and all outputs simultaneously.
Regulatory and Certification Information 9. Intel® Server Board S5000PAL/S5000XAL TPS Regulatory and Certification Information 9.1 Product Regulatory Compliance Intended Application – This product was evaluated as Information Technology Equipment (ITE), which may be installed in offices, schools, computer rooms, and similar commercial type locations.
Intel® Server Board S5000PAL/S5000XAL TPS 9.2 Regulatory and Certification Information Electromagnetic Compatibility Notices 9.2.1 FCC Verification Statement (USA) This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Intel Corporation 5200 N.E.
Regulatory and Certification Information Intel® Server Board S5000PAL/S5000XAL TPS 9.2.4 BSMI (Taiwan) The BSMI Certification Marking and EMC warning is located on the outside rear area of the product. 9.2.5 RRL (Korea) Following is the RRL certification information for Korea. English translation of the notice above: 1. 2. 3. 4. 5. 70 Type of Equipment (Model Name): On License and Product Certification No.: On RRL certificate.
Intel® Server Board S5000PAL/S5000XAL TPS 9.3 Regulatory and Certification Information Product Ecology Compliance ® Intel has a system in place to restrict the use of banned substances in accordance with world wide product ecology regulatory requirements. The following is Intel’s product ecology compliance criteria. Compliance Regional Description California China Intel Internal Specification Europe Compliance Reference California Code of Regulations, Title 22, Division 4.
Regulatory and Certification Information Compliance Regional Description Intel® Server Board S5000PAL/S5000XAL TPS Compliance Reference Compliance Reference Marking Example Recycling Markings – Fiberboard (FB) and Cardboard (CB) are marked with international recycling marks. Applied to outer bulk packaging and single package. Japan 9.
Intel® Server Board S5000PAL/S5000XAL TPS Appendix A: Integration and Usage Tips Appendix A: Integration and Usage Tips When adding or removing components or peripherals from the server board, AC power must be removed. With AC power plugged into the server board, 5-volt standby is still present even though the server board is powered off. When two processors are installed, both must be of identical revision, core voltage, and bus/core speed.
Appendix A: Integration and Usage Tips 74 Intel® Server Board S5000PAL/S5000XAL TPS When performing a BIOS update procedure, the BIOS select jumper must be set to its default position (pins 2-3). When AC power is applied to the server, a 25-30 second delay is necessary to initialize the BMC. During this initialization period, the Power Button functionality is disabled. Intel order number: D31979-011 Revision 2.
Intel® Server Board S5000PAL/S5000XAL TPS Appendix B: BMC Sensor Tables Appendix B: BMC Sensor Tables This appendix lists the sensor identification numbers and information regarding the sensor type, name, supported thresholds, assertion and de-assertion information, and a brief description of the sensor purpose. See the Intelligent Platform Management Interface Specification, Version 1.5, for sensor and event/reading-type table information.
Appendix B: BMC Sensor Tables Rearm Sensors The rearm is a request for the event status for a sensor to be rechecked and updated upon a transition between good and bad states. Rearming the sensors can be done manually or automatically. This column indicates the type supported by the sensor. The following abbreviations are used in the comment column to describe a sensor: A: Auto-rearm M: Manual rearm Default Hysteresis Hysteresis setting applies to all thresholds of the sensor.
Intel® Server Board S5000PAL/S5000XAL TPS Appendix B: BMC Sensor Tables Table 43.
Appendix B: BMC Sensor Tables Sensor Name Watchdog Sensor Number 03h System Applicability All Intel® Server Board S5000PAL/S5000XAL TPS Sensor Type Watchdog 2 23h Event/Read ing Type Event Offset Triggers OK Assert/De-as Readable Event Data sert Value/Offset s As – Trig Offset A X OK As – Trig Offset A X OK As and De – Trig Offset A X OK As – Trig Offset A – Log area reset/cleared OK As – Trig Offset A X 00h – Session activation OK As – As defined by IPMI A X Sen
Intel® Server Board S5000PAL/S5000XAL TPS Sensor Name Sensor Number System Applicability All System Event ('System Event') 0Bh BB +1.2V Vtt 10h All BB+1.9V NIC Core 11h All BB +1.5V AUX 12h BB +1.5V 13h BB +1.8V BB +3.
Appendix B: BMC Sensor Tables Sensor Name BB Temp Sensor Number 30h Front Panel Temp 32h Fan 1A 50h Fan 2A Fan 3A 51h 52h System Applicability All All Intel® Server Board S5000PAL/S5000XAL TPS Sensor Type Event/Read ing Type Temperature Threshold 01h 01h Temperature Threshold 01h 01h Chassisspecific Fan Threshold 04h 01h Chassisspecific Fan Threshold 04h 01h Chassisspecific Fan Threshold 04h 01h Fan 4A 53h Chassisspecific Fan Threshold 04h 01h Fan 5A 54h Chassiss
Intel® Server Board S5000PAL/S5000XAL TPS Sensor Name Sensor Number Fan 2 Present 61h Fan 3 Present 62h Fan 4 Present 63h Fan 5 Present 64h Fan 6 Present 65h Fan 7 Present System Applicability Chassisspecific Sensor Type Appendix B: BMC Sensor Tables Event/Read ing Type Fan Generic 04h 08h Chassisspecific Fan Generic 04h 08h Chassisspecific Fan Generic 04h 08h Chassisspecific Fan Generic 04h 08h Chassisspecific Fan Generic 04h 08h 66h Chassisspecific Fan Generic
Appendix B: BMC Sensor Tables Sensor Name Sensor Number System Applicability Intel® Server Board S5000PAL/S5000XAL TPS Sensor Type Event/Read ing Type Event Offset Triggers Redun degrade from full Criticality Assert/De-as Readable sert Value/Offset s Event Data Rearm Standby OK Redun degrade from nonredundant Power Supply Status 1 Power Supply Status 2 Power Nozzle 70h Chassisspecific Power Supply Sensor Specific 08h 6Fh 71h Chassisspecific Power Supply Sensor Specific 08h 6Fh 78h Ch
Intel® Server Board S5000PAL/S5000XAL TPS Sensor Name Power Gauge V1 rail (+12v) Sensor Number 7Bh System Applicability Chassisspecific Sensor Type Appendix B: BMC Sensor Tables Event/Read ing Type Current Threshold 03h 01h Chassisspecific Other Units Threshold 0Bh 01h Chassisspecific Other Units Threshold 0Bh 01h All System ACPI Power State 22h Event Offset Triggers Criticality Assert/De-as Readable Event Data sert Value/Offset s As and De Analog R, T Rearm Standby A – [u] [c,
Appendix B: BMC Sensor Tables Sensor Name Sensor Failure Sensor Number 86h System Applicability All Intel® Server Board S5000PAL/S5000XAL TPS Sensor Type Sensor Failure F6h Event/Read ing Type OEM Sensor Specific 73h Event Offset Triggers I2C device not found Criticality OK Assert/De-as Readable Event Data sert Value/Offset s As – Trig Offset Rearm A Standby X I2C device error detected I2C bus timeout NMI Signal 87h State All SMI Signal 88h State All Proc 1 Status All OEM C0h Digital
Intel® Server Board S5000PAL/S5000XAL TPS Sensor Name Sensor Number PCIe Link1 A1h PCIe Link2 A2h PCIe Link3 A3h PCIe Link4 A4h PCIe Link5 A5h PCIe Link6 A6h PCIe Link7 A7h Revision 2.
Appendix B: BMC Sensor Tables Sensor Name Sensor Number PCIe Link8 A8h PCIe Link9 A9h PCIe Link10 PCIe Link11 PCIe Link12 PCIe Link13 86 AAh ABh ACh ADh Intel® Server Board S5000PAL/S5000XAL TPS System Applicability 13F Sensor Type 6Fh Critical Interrupt Sensor Specific 13F 6Fh Critical Interrupt Sensor Specific 13F 6Fh Critical Interrupt Sensor Specific 13F 6Fh Critical Interrupt Sensor Specific 13F 6Fh Critical Interrupt Sensor Specific 13F 6Fh Critical Interrupt Sen
Intel® Server Board S5000PAL/S5000XAL TPS Sensor Name Sensor Number Proc 1 Thermal Control C0h Proc 2 Thermal Control C1h Proc 1 VRD Over Temp C8h Proc 2 VRD Over Temp C9h System Applicability All All All Event/Read ing Type Temperature Threshold 01h 01h Temperature Threshold 01h 01h Temperature Digital Discrete Event Offset Triggers Criticality Assert/De-as Readable Event Data sert Value/Offset s As and De Analog Trig Offset Rearm Standby M – [u] [c,nc] Threshold defined [
Appendix B: BMC Sensor Tables Sensor Name Sensor Number System Applicability Intel® Server Board S5000PAL/S5000XAL TPS Sensor Type 21h DIMM B1 DIMM B2 DIMM C1 DIMM C2 DIMM D1 DIMM D2 88 E2h E3h E4h E5h E6h E7h All All All All All All Event/Read ing Type 6Fh Event Offset Triggers Criticality Device installed OK Disabled Degraded Sparing OK Slot Connector Sensor Specific Fault status asserted Degraded 21h 6Fh Device installed OK Disabled Degraded Sparing OK Slot
Intel® Server Board S5000PAL/S5000XAL TPS Sensor Name Memory A Error Memory B Error Memory C Error Memory D Error Sensor Number ECh All Sensor Type EDh EEh EFh F0h B0 DIMM Sparing Redundancy F1h Systemspecific Systemspecific Systemspecific All All Event/Read ing Type Event Offset Triggers Criticality Assert/De-as Readable sert Value/Offset s Event Data Rearm Standby Disabled Degraded Sparing OK Sensor Specific Correctable ECC OK As – Trig Offset A – 6Fh Uncorrectable
Appendix B: BMC Sensor Tables Sensor Name Sensor Number System Applicability Sparing Redundancy Intel® Server Board S5000PAL/S5000XAL TPS Sensor Type 0Ch Event/Read ing Type 0Bh Event Offset Triggers Criticality Assert/De-as Readable sert Value/Offset s Event Data Rearm Standby Non-red: suff Degraded res from redund Non-red: suff res from insuff res B01 DIMM Mirroring Enabled F4h B01 DIMM Mirroring Redundancy F5h All All Entity Presence Sensor Specific 25h 6Fh Memory Discrete 0Bh
Intel® Server Board S5000PAL/S5000XAL TPS Appendix C: POST Code Diagnostic LED Decoder Appendix C: POST Code Diagnostic LED Decoder During the system boot process, BIOS executes a number of platform configuration processes, each of which is assigned a specific hex POST code number. As each configuration routine is started, BIOS will display the given POST code to the POST Code Diagnostic LEDs found on the back edge of the server board.
Appendix C: POST Code Diagnostic LED Decoder Intel® Server Board S5000PAL/S5000XAL TPS Table 45.
Intel® Server Board S5000PAL/S5000XAL TPS Checkpoint 0x93h Diagnostic LED Decoder G=Green, R=Red, A=Amber MSB LSB R OFF G A Appendix C: POST Code Diagnostic LED Decoder Description Enabling the keyboard 0x94h R G OFF R Clearing keyboard input buffer 0x95h R G OFF A Instructing keyboard controller to run Self Test (PS2 only) Mouse (PS2 or USB) 0x98h A OFF OFF R Resetting the mouse 0x99h A OFF OFF A Detecting the mouse 0x9Ah A OFF G R Detecting the presence of mouse 0x9Bh A
Appendix C: POST Code Diagnostic LED Decoder Checkpoint 0xE8h Diagnostic LED Decoder G=Green, R=Red, A=Amber MSB LSB A R R OFF Intel® Server Board S5000PAL/S5000XAL TPS Description Checking password 0xE9h A R R G Entering BIOS setup 0xEAh A R A OFF Flash Update 0xEEh A A A OFF Calling Int 19. One beep unless silent boot is enabled.
Intel® Server Board S5000PAL/S5000XAL TPS Appendix D: POST Error Messages and Handling Appendix D: POST Error Messages and Handling Whenever possible, the BIOS will output the current boot progress codes on the video screen. Progress codes are 32-bit quantities plus optional data. The 32-bit numbers include class, subclass, and operation information. The class and subclass fields point to the type of hardware that is being initialized. The operation field represents the specific initialization activity.
Appendix D: POST Error Messages and Handling Intel® Server Board S5000PAL/S5000XAL TPS Error Code 84FF System event log full Error Message Response Pause 8500 Memory Component could not be configured in the selected RAS mode. Pause 8520 DIMM_A1 failed Self Test (BIST). Pause 8521 DIMM_A2 failed Self Test (BIST). Pause 8522 DIMM_A3 failed Self Test (BIST). Pause 8523 DIMM_A4 failed Self Test (BIST). Pause 8524 DIMM_B1 failed Self Test (BIST).
Intel® Server Board S5000PAL/S5000XAL TPS Appendix D: POST Error Messages and Handling POST Error Beep Codes The following table lists POST error beep codes. Prior to system Video initialization, BIOS uses these beep codes to inform users on error conditions. The beep code is followed by a user visible code on POST Progress LEDs. Table 47.
Appendix E: Supported Intel® Server Chassis Intel® Server Board S5000PAL/S5000XAL TPS Appendix E: Supported Intel® Server Chassis The Intel® Server Board S5000PAL/S5000XAL is supported in the following Intel high density rack mount server chassis: Intel® Server Chassis SR1500 Intel® Server Chassis SR1550 Intel® Server Chassis SR2500 This section provides a high level descriptive overview of each chassis.
Intel® Server Board S5000PAL/S5000XAL TPS Appendix E: Supported Intel® Server Chassis A Rack Handles L Riser Card Assembly B SAS/SATA Backplane SAS RAID Battery Pack (Optional) Power Supply Air Duct M System Memory N Processor and Heat Sink O Processor Air Duct P C D E Power Distribution Board 1+1 650 Watt Power Supply Modules ® Intel Server Board S5000PAL/S5000XAL Q H Bridge Board S I Intel® RMM Module (Optional) T J Intel® RMM NIC(Optional) U System Fan Bank Mid-plane Board (Act
Appendix E: Supported Intel® Server Chassis Intel® Server Board S5000PAL/S5000XAL TPS E F D C B A G N H M I L K A J TP02094 A. Rack Handles H. CPU Air Duct B. SAS/SATA Backplane I. System Fan Assembly C. Air Baffles J. Standard Control Panel D. Power Distribution Module 1+1 750 Watt Power Supply Modules Riser Card Assembly K. Flex Bay – 6th HDD or Tape (Optional) L. Five SATA/SAS Hard Drive Bays M. Slim-Line Optical Drive Bay N. Front Bezel (Optional) E. F. G.
Intel® Server Board S5000PAL/S5000XAL TPS Glossary Glossary This appendix contains important terms used in the preceding chapters. For ease of use, numeric entries are listed first (e.g., “82460GX”) with alpha entries following (e.g., “AGP 4x”). Acronyms are then entered in their respective place, with non-acronyms following.
Glossary Intel® Server Board S5000PAL/S5000XAL TPS Term IPMI Intelligent Platform Management Interface Definition IR Infrared ITP In-Target Probe KB 1024 bytes KCS Keyboard Controller Style LAN Local Area Network LCD Liquid Crystal Display LED Light Emitting Diode LPC Low Pin Count LUN Logical Unit Number MAC Media Access Control MB 1024KB MCH Memory Controller Hub MD2 Message Digest 2 – Hashing Algorithm MD5 Message Digest 5 – Hashing Algorithm – Higher Security ms millise
Intel® Server Board S5000PAL/S5000XAL TPS Term UHCI Universal Host Controller Interface UTC Universal time coordinate VID Voltage Identification VRD Voltage Regulator Down Definition Word 16-bit quantity ZIF Zero Insertion Force Revision 2.
Reference Documents Intel® Server Board S5000PAL/S5000XAL TPS Reference Documents See the following documents for additional information: Intel® S5000 Series Chipsets Server Board Family Datasheet Intel® S5000 Server Board Family BIOS Core External Product Specification (Yellow Cover) Intel® S5000 Server Board Family BMC Core External Product Specification (Yellow Cover) Intel® 5000P Memory Controller Hub External Design Specification (Yellow Cover) Intel® Enterprise South Bridge-2 (ESB-2
