Intel® Server Board S5000PAL / S5000XAL Technical Product Specification Intel order number: D31979-010 Revision 1.7 February 2008 Enterprise Platforms and Services Division – Marketing ii Revision 1.
Intel® Server Board S5000PAL / S5000XAL TPS Revision History Revision History Date April 2006 Revision Number 1.0 Modifications June 2006 1.1 Updated theoretical memory bandwidth performance numbers. Added Platform Control sections. August 2006 1.2 Memory RAS is now available. Updated Snoop Filter Section. Updated Figures #16 and #25. January 2007 1.3 Updated Table 44 BMC sensor. Updated CMOS clear and password reset usage procedures. Updated regulatory tables. May 2007 1.
Disclaimers Intel® Server Board S5000PAL / S5000XAL TPS Disclaimers Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document.
Intel® Server Board S5000PAL / S5000XAL TPS Table of Contents Table of Contents 1. 2. 3. Introduction ........................................................................................................................ 12 1.1 Chapter Outline...................................................................................................... 12 1.2 Server Board Use Disclaimer ................................................................................ 12 Product Overview....................
Table of Contents 5.4 Riser Card Slots..................................................................................................... 47 5.5 SSI Control Panel Connector................................................................................. 52 5.6 Bridge Board Connector ........................................................................................ 52 5.7 I/O Connector Pin-out Definition ............................................................................ 54 5.7.
Intel® Server Board S5000PAL / S5000XAL TPS 9. Table of Contents 8.2.10 Closed-Loop Stability............................................................................................. 73 8.2.11 Common Mode Noise ............................................................................................ 73 8.2.12 Ripple / Noise ........................................................................................................ 74 8.2.13 Soft Starting ........................................
List of Figures Intel® Server Board S5000PAL / S5000XAL TPS List of Figures Figure 1. Components & Connector Location Diagram .............................................................. 16 Figure 2. Light Guided Diagnostic LED Location Diagram ......................................................... 17 Figure 3. Intel® Server Board S5000PAL / S5000XAL ATX I/O Layout ..................................... 18 Figure 4.
Intel® Server Board S5000PAL / S5000XAL TPS List of Tables List of Tables Table 1. I2C Addresses for Memory Module SMB ..................................................................... 27 Table 2. Maximum 8 DIMM System Memory Configuration – x8 Single Rank ........................... 28 Table 3. Maximum 8 DIMM System Memory Configuration – x4 Dual Rank .............................. 28 Table 4. PCI Bus Segment Characteristics.............................................................................
List of Tables Intel® Server Board S5000PAL / S5000XAL TPS Table 36: No load operating range ........................................................................................... 71 Table 37. Voltage Regulation Limits ........................................................................................... 72 Table 38. Transient Load Requirements..................................................................................... 73 Table 39. Capacitive Loading Conditions .........................
Intel® Server Board S5000PAL / S5000XAL TPS List of Tables < This page intentionally left blank. > Revision 1.
Intel® Server Board S5000PAL / S5000XAL TPS Introduction 1. Introduction This Technical Product Specification (TPS) provides board specific information detailing the features, functionality, and high level architecture of the Intel® Server Board S5000PAL and Intel® Server Board S5000XAL. The Intel® S5000 Series Chipsets Server Board Family Datasheet should also be referenced for more in depth detail of various board sub-systems including chipset, BIOS, System Management, and System Management software.
Intel® Server Board S5000PAL / S5000XAL TPS 2. Product Overview Product Overview The Intel® Server Board S5000PAL and Intel® Server Board S5000XAL are monolithic printed circuit boards with features that were designed to support the high-density 1U and 2U server markets. 2.
Intel® Server Board S5000PAL / S5000XAL TPS Product Overview 2.2 14 Server Board Layout Revision 1.
Intel® Server Board S5000PAL / S5000XAL TPS 2.2.1 Product Overview Connector and Component Locations The following figure shows the board layout of the server board. Each connector and major component is identified by a number or letter, and a description is given below the figure. A B C D E F G H I QQ J PP K L OO NN MM LL KK JJ II M N HH GG FF EE O DD CC BB AA P Q Z Y X W V U TS R TP02071 Revision 1.
Intel® Server Board S5000PAL / S5000XAL TPS Product Overview A Description BIOS Bank Select Jumper B Intel ESB-2 IO Controller Hub W CPU Power Connector C IO Module Option Connector X Main Power Connector D POST Code Diagnostic LEDs Y Battery E Intel Adaptive Slot – Full Height Z Power Supply Management Connector F PCI Express* Riser Slot – Low Profile AA Dual Port USB 2.
Intel® Server Board S5000PAL / S5000XAL TPS 2.2.2 Product Overview Light Guided Diagnostic LED Locations B C A I J K L DM N O P GS QE RF TP02317 A Description Post Code Diagnostic LEDs B System Identification LED – Blue F CPU Fault LED C System Status LED – Green / Amber G 5-Volt Stand-by Present LED D DIMM Fault LEDs E Description CPU Fault LED Figure 2. Light Guided Diagnostic LED Location Diagram Revision 1.
Intel® Server Board S5000PAL / S5000XAL TPS Product Overview 2.2.3 External I/O Connector Locations The drawing below shows the layout of the rear I/O components for the server board. A B C D E F G H TP02296 A PS/2 Mouse E NIC port 2 (1 Gb) B PS/2 Keyboard F Video C Serial Port B G USB port 1 D NIC port 1 (1 Gb) H USB port 2 Figure 3. Intel® Server Board S5000PAL / S5000XAL ATX I/O Layout 18 Revision 1.
Intel® Server Board S5000PAL / S5000XAL TPS 288.29 [11.350] Molex 43202-8927 6026A0027801 196.85 [7.750] 118.11 [4.650] 2 x 124.46 [4.900] 2 x 86.89 [3.421] 82.80 [3.260] 44.89 [1.767] 33.91 [1.335] Server Board Mechanical Drawings 2 x 0.00 [0.000] 11.02 [0.434] 11.91 [0.469] 16.76 [0.660] 16.51 [0.650] 2.2.4 Product Overview 10.16 [0.400] 2 x 0.00 [0.000] 0.91 [0.036] 15.24 [0.600] 21.59 [0.850] Lotes B2515BB2M 6012A0019603 45.59 [1.795] 2 x 49.35 [1.943] 62.66 [2.467] 67.31 [2.
278.38 [10.960] 280.71 [11.052] 263.14 [10.360] 244.27 [9.617] 224.21 [8.827] 200.13 [7.879] 205.97 [8.109] 175.03 [6.891] 141.78 [5.582] 87.88 [3.460] 94.23 [3.710] 100.58 [3.960] 104.39 [4.110] 106.93 [4.210] 127.20 [5.008] 80.14 [3.155] 56.84 [2.238] 0.00 [0.000] 5.21 [0.205] 9.32 [0.367] 16.51 [0.650] 3 x 13.59 [0.535] 2 x 12.33 [0.485] 12.27 [0.483] 9.07 [0.357] 158.80 [6.252] Intel® Server Board S5000PAL / S5000XAL TPS Product Overview 10.16 [0.400] 5 x 6.99 [0.275] 6.27 [0.247] 2.
H < 3.5 mm [0.138"] for Three Boards 288.29 [11.350] 267.51 [10.532] 198.02 [7.796] 207.98 [8.188] H < 11.65 mm [0.459"] Under Rear Panel Tab 96.98 [3.818] 98.88 [3.893] 101.90 [4.012] 109.40 [4.307] 120.85 [4.758] 125.27 [4.932] 129.69 [5.106] 134.62 [5.300] 137.72 [5.422] 0.00 [0.000] 57.89 [2.279] No Components Allowed for Retention Pins Product Overview H < 30 mm [1.181"] PCI BKT Drop Down 0.76 [0.030] 16.51 [0.650] 13.18 [0.519] 9.27 [0.365] 3.28 [0.
0.00 [0.000] 16.51 [0.650] 3 Ground Pad on Side 2 H < 1.47 mm [0.058"] Typ. No Components or Surface Layer Traces in this Zone. 2 X 5.00 [0.197] 3 X 3.99 [0.157] 10.16 [0.400] 288.29 [11.350] Intel® Server Board S5000PAL / S5000XAL TPS Product Overview 3.00 [0.118] 0.00 [0.000] 10.13 [0.399] Ø 29.46 [1.160] Typ. H < 2 mm [0.078] 15.24 [0.600] Typ. Backside Spring Area. No Motherboard Component Placement Allowed. Ø 2.000 [50.8 mm] Typ. 180.34 [7.100] 200.03 [7.875] 0.200" [5.
285.75 [11.250] 199.21 [7.843] Product Overview 113.13 [4.454] 0.00 [0.000] 16.51 [0.650] Intel® Server Board S5000PAL / S5000XAL TPS 10.16 [0.400] 0.00 [0.000] NO Components Allowed for Duct 143.51 [5.650] 2 x 173.99 [6.850] 182.83 [7.198] H < 10.0 mm [0.394"] Under Duct H < 0.8 mm [0.310"] Under VR H < 1.5 mm [0.059"] Under VR 256.54 [10.100] 3 x 274.32 [10.800] 2 x 77.22 [3.040] 6.35 [0.250] 125.78 [4.952] 109.86 [4.325] 5.52 [0.217] 4.83 [0.190] 11.69 [0.460] 298.51 [11.
Intel® Server Board S5000PAL / S5000XAL TPS Functional Architecture 3. Functional Architecture The architecture and design of the Intel® Server Board S5000PAL / S5000XAL is based on the Intel® 5000 Chipset Family. The chipset is designed for systems based on the Dual-Core Intel® Xeon® processor 5000 sequence with system bus speeds of 667 MHz, 1066 MHz, and 1333 MHz.
Intel® Server Board S5000PAL / S5000XAL TPS 3.1 Functional Architecture Intel® 5000P and 5000X Memory Controller Hubs (MCH) This section will describe the general functionality of the memory controller hub as it is implemented on this server board. Depending on the version of the server board in use, it may support either the Intel® 5000P MCH or the Intel® 5000X MCH. Features that are unique to a particular MCH will be so referenced.
Intel® Server Board S5000PAL / S5000XAL TPS Functional Architecture 3.1.2.1 Processor Population Rules When two processors are installed, both must be of identical revision, core voltage, and bus/core speed. Mixed processor steppings is supported. However, the stepping of one processor cannot be greater than one stepping back of the other. When only one processor is installed, it must be in the socket labeled CPU1. The other socket must be empty.
Intel® Server Board S5000PAL / S5000XAL TPS Functional Architecture a total read bandwidth of 21GB/s for four FB-DIMM channels. Thus, this provides 10.7 GB/s of write memory bandwidth for four FB-DIMM channels. The total bandwidth is based on read bandwidth thus the total bandwidth is 17 GB/s for 533 and 21.0 GB/s for 667. On the Intel® Server Board S5000PAL / S5000XAL, a pair of channels becomes a branch where Branch 0 consists of channels A and B, and Branch 1 consists of channels C and D.
Intel® Server Board S5000PAL / S5000XAL TPS Functional Architecture Table 2. Maximum 8 DIMM System Memory Configuration – x8 Single Rank DRAM Technology x8 Single Rank 256 Mb 512 Mb 1024 Mb 2048 Mb Maximum Capacity Mirrored Mode 1 GB 2 GB 4 GB 8 GB Maximum Capacity Non-Mirrored Mode 2 GB 4 GB 8 GB 16 GB Table 3.
Intel® Server Board S5000PAL / S5000XAL TPS Functional Architecture Y (0) Y Y (0) Y Y (0, 1) Notes: - Single channel mode is only tested and supported with a 512MB x8 FBDIMM installed in DIMM Slot A1. - The supported memory configurations must meet population rules defined above. - For best performance, the number of DIMMs installed should be balanced across both memory branches.
Intel® Server Board S5000PAL / S5000XAL TPS Functional Architecture 3.1.3.4 Non-mirrored mode memory upgrades The minimum memory upgrade increment is two DIMMs per branch. The DIMMs must cover the same slot position on both channels. DIMMs pairs must be identical with respect to size, speed, and organization. DIMMs that cover adjacent slot positions do not need to be identical.
Intel® Server Board S5000PAL / S5000XAL TPS 3.1.3.4.2 Functional Architecture DIMM Sparing Mode Memory Configuration The MCH provides DIMM sparing capabilities. Sparing is a RAS feature that involves configuring a DIMM to be placed in reserve so it can be use to replace a DIMM that fails. DIMM sparing occurs within a given bank of memory and is not supported across branches. There are two supported Memory Sparing configurations. 3.1.3.4.2.
Intel® Server Board S5000PAL / S5000XAL TPS Functional Architecture 3.1.3.4.2.2 Dual Branch Mode Sparing Dual branch mode sparing requires that all eight DIMM slots be populated and must comply with the following population rules. • DIMM_A1 and DIMM_B1 must be identical in organization, size and speed. • DIMM_A2 and DIMM_B2 must be identical in organization, size and speed. • DIMM_C1 and DIMM_D1 must be identical in organization, size and speed.
Intel® Server Board S5000PAL / S5000XAL TPS Functional Architecture This section describes the function of most of the listed features as they pertain to this server board. For more detail information, see the Intel® S5000 Series Chipsets Server Board Family Datasheet or the Intel® Enterprise South Bridge-2 External Design Specification (Yellow Cover) 3.2.1 PCI Sub-system The primary I/O buses for the server board are PCI, PCI Express*, and PCI-X*, with six independent PCI bus segments.
Intel® Server Board S5000PAL / S5000XAL TPS Functional Architecture 3.2.1.5 PE4, PE5: Two x4 PCI Express* Bus Segments Two x4 PCI Express* bus segments are directed through the MCH. These PCI Express segments, PE4 and PE5, support one x8 or two x4 PCI Express segments to the low profile riser slot (J5B1). 3.2.1.6 PE6, PE7: Two x4 PCI Express* Bus Segments Two x4 PCI Express* bus segments are directed through the MCH.
Intel® Server Board S5000PAL / S5000XAL TPS Functional Architecture Full Height PCI Express* Riser 1 add-in card populated 2 add-in cards populated 1U – 1 add-in card slot 2U – 3 add-in card slots x4 or x8 Single PCIe* x4 in either slot or x8 in middle slot Or PCI-X* – Up to 133MHz in bottom slot NA Single PCIe* – x4 in either slot or x8 in middle slot and PCI-X* – Up to 133MHz Or Dual PCIe – x4 3.2.
Intel® Server Board S5000PAL / S5000XAL TPS Functional Architecture 3.2.2.
Intel® Server Board S5000PAL / S5000XAL TPS 3.3.1.1 Functional Architecture Video Modes The ATI ES1000 chip supports all standard IBM* VGA modes. The following table shows the 2D modes supported for both CRT and LCD. Table 5.
Intel® Server Board S5000PAL / S5000XAL TPS Functional Architecture 3.4 Network Interface Controller (NIC) Network interface support is provided from the built in Dual GbE MAC features of the ESB-2 in conjunction with the Intel® 82563EB compact Physical Layer Transceiver (PHY). Together, they provide the server board with support for dual LAN ports designed for 10/100/1000 Mbps operation. The 82563EB device is based upon proven PHY technology integrated into the Intel® Gigabit Ethernet Controllers.
Intel® Server Board S5000PAL / S5000XAL TPS 3.5 Functional Architecture Super I/O Legacy I/O support is provided by using a National Semiconductor* PC87427 Super I/O device. This chip contains all of the necessary circuitry to support the following functions: • GPIOs • Two serial ports • Keyboard and mouse support • Wake up control • System health support 3.5.1.1 Serial Ports The server board provides two serial ports: an external RJ45 serial port, and an internal DH10 serial header.
Intel® Server Board S5000PAL / S5000XAL TPS Functional Architecture J8A3 2 3 4 1-2: DCD to DTR 3-4: DSR to DTR (factory default) TP02303 Figure 15. Serial Port Configuration Jumper Location Pins 1-2 What happens at system reset… Serial port is configured for DCD to DTR 3-4 Serial port is configured for DSR to DTR (default) For server applications that require a DB9 serial connector, an 8-pin RJ45-to-DB9 adapter must be used.
Intel® Server Board S5000PAL / S5000XAL TPS 3.5.1.4 Functional Architecture Wake-up Control The super I/O contains functionality that allows various events to power-on and power-off the system. 3.5.1.5 System Health Support The super I/O provides an interface via GPIOs for BIOS and Server Management Firmware to activate the Diagnostic LEDs, the FRU fault indicator LEDs for processors, DIMMs, fans and the system status LED. Refer to Figure 2.
Intel® Server Board S5000PAL / S5000XAL TPS Platform Management 4. Platform Management The platform management sub-system on the server board is based on the integrated Baseboard Management Controller (BMC) features of the ESB-2. The on board platform management subsystem consists of communication buses, sensors, system BIOS, and server management firmware. The following diagram provides an overview of the Server Management Bus (SMBUS) architecture used on this server board.
Intel® Server Board S5000PAL / S5000XAL TPS Connector / Header Locations and Pin-outs 5. Connector / Header Locations and Pin-outs 5.1 Board Connector Information The following section provides detailed information regarding all connectors, headers and jumpers on the server board. Table 9 lists all connector types available on the board and the corresponding reference designators printed on the silkscreen. Table 9.
Intel® Server Board S5000PAL / S5000XAL TPS Connector / Header Locations and Pin-outs Connector Quantity System Recovery Setting Jumpers 5.2 Reference Designators 4 Connector Type J1D1, J1D2, J1D3, J3H1 Jumper Pin Count 3 Power Connectors The main power supply connection is obtained using an SSI compliant 2x12 pin connector (J3K3).
Intel® Server Board S5000PAL / S5000XAL TPS 5.3 Connector / Header Locations and Pin-outs System Management Headers 5.3.1 Intel® Remote Management Module (RMM) Connector A 120-pin Intel® RMM Connector (J1C5) is included on the server board for sole support of the optional Intel® Remote Management Module. There is no support for third party ASMI cards on this server board.
Intel® Server Board S5000PAL / S5000XAL TPS Connector / Header Locations and Pin-outs Pin 73 Signal Name V_LCDDATA23 Pin 74 Signal Name V_LCDDATA13 75 V_LCDDATA22 76 V_LCDDATA12 77 V_LCDDATA21 78 V_LCDDATA11 79 V_LCDDATA20 80 GND 81 V_LCDDATA19 82 V_LCDCNTL2 83 GND 84 V_DVO_DDC_SDA 85 FM_MAN_LAN_TYPE1 86 V_DVO_DDC_SCL 87 FM_MAN_LAN_TYPE1 88 RST_PS_PWRGD 89 Reserved - NC 90 Reserved - NC 91 Reserved - NC 92 Reserved - NC 93 MII_MDC_RMII_SPARE 94 Reserved - NC 95
Intel® Server Board S5000PAL / S5000XAL TPS 5.3.3 Connector / Header Locations and Pin-outs LCP/AUX IPMB Header Table 15. LPC/AUX IPMB Header Pin-out (J1C2) 1 Pin Signal Name SMB_IPMB_5VSB_DAT Description BMC IMB 5V Standby Data Line 2 GND Ground 3 SMB_IPMB_5VSB_CLK BMC IMB 5V Standby Clock Line 4 P5V_STBY +5V Standby Power 5.3.4 IPMB Header Table 16. IPMB Header Pin-out (J1C3) Pin 5.
Intel® Server Board S5000PAL / S5000XAL TPS Connector / Header Locations and Pin-outs Pin Side B PCI Spec Signal 20 PE4_MCH_TXN_C <3..0> 21 1 Pin Side A 20 GND 22 GND 21 PE4_MCH_RXP <3..0> 1 22 PE4_MCH_RXN <3..0> 1 23 PE4_MCH_TXP_C <3..0> 2 23 24 PE4_MCH_TXN_C <3..0> 2 24 25 GND 26 GND 2 26 PE4_MCH_RXN <3..0> 2 3 27 28 PE4_MCH_TXN_C <3..0> 3 28 30 P3V3 31 32 GND GND PE4_MCH_RXP <3..0> PE4_MCH_TXP_C <3..
Intel® Server Board S5000PAL / S5000XAL TPS Connector / Header Locations and Pin-outs Pin-Side B PCI Spec Signal Pin-Side A PCI Spec Signal 128 GND 128 HSIp(0) 127 GND 127 HSIn(0) 126 HSOp(1) 126 GND 125 HSOn(1) 125 GND 124 GND 124 HSIp(1) 123 GND 123 HSIn(1) 122 HSOp(2) 122 GND 121 HSOn(2) 121 GND 120 GND 120 HSIp(2) 119 GND 119 HSIn(2) 118 HSOp(3) 118 GND 117 HSOn(3) 117 GND 116 GND 116 HSIp(3) 115 GND 115 HSIn(3) 114 HSOp(4) 114 GND 113 HSOn(
Connector / Header Locations and Pin-outs Intel® Server Board S5000PAL / S5000XAL TPS Pin-Side B PCI Spec Signal Pin-Side A PCI Spec Signal KEY 82 50 Reserved KEY 82 +5V 81 GND 81 Reserved 80 CLK1 80 GND 79 Ground 79 GNT2# 78 REQ1# 78 +3.3V 77 +3.3V 77 GNT1# 76 PME2# 76 Ground 75 AD[31] 75 PME1# 74 AD[29] 74 PME3# 73 Ground 73 AD[30] 72 AD[27] 72 +3.3V 71 AD[25] 71 AD[28] 70 +3.
Intel® Server Board S5000PAL / S5000XAL TPS Connector / Header Locations and Pin-outs Pin-Side B PCI Spec Signal Pin-Side A PCI Spec Signal 36 +3.3V 36 +3.3V 35 ACK64# 35 REQ64# 34 +5V 34 +5V 33 +5V 33 +5V 32 Reserved 32 +5V 31 Ground 31 C/BE[7]# 30 C/BE[6]# 30 C/BE[5]# 29 C/BE[4]# 29 Ground 28 Ground 28 PAR64 27 AD[63] 27 AD[62] 26 AD[61] 26 3.3V 25 3.
Intel® Server Board S5000PAL / S5000XAL TPS Connector / Header Locations and Pin-outs 5.5 SSI Control Panel Connector The server board provides a 24-pin SSI control panel connector (J3H2) for use with non-Intel chassis. The following table provides the pin-out for this connector. Table 19. Front Panel SSI Standard 24-pin Connector Pin-out (J3H2) Pin 5.
Intel® Server Board S5000PAL / S5000XAL TPS Signal Name Connector / Header Locations and Pin-outs Pin A19 GND Pin B19 GND Signal Name A20 PE1_ESB_RXN_C<0> B20 FM_RAID_MODE A21 PE1_ESB_RXP_C<0> B21 GND A22 GND B22 CLK_100M_SRLAKE_N A23 FM_FAN_D_PRSNT1 B23 CLK_100M_SRLAKE_P A24 FM_FAN_D_PRSNT3 B24 GND A25 FM_FAN_D_PRSNT2 B25 SGPIO_DATAOUT1_R A26 GND B26 SGPIO_DATAOUT0_R A27 USB_ESB_P4P B27 SGPIO_LOAD_R A28 USB_ESB_P4N B28 SGPIO_CLOCK_N A29 GND B29 GND A30 USB_ES
Intel® Server Board S5000PAL / S5000XAL TPS Connector / Header Locations and Pin-outs 5.7 I/O Connector Pin-out Definition 5.7.1 VGA Connector The following table details the pin-out definition of the VGA connector (J6A1). Table 21.
Intel® Server Board S5000PAL / S5000XAL TPS 5.7.3 Connector / Header Locations and Pin-outs IDE Connector The server board includes an IDE connector to access the single IDE channel from the ESB-2 IO controller hub. The design intent for this connector is to provide IDE support for a single slim-line optical drive, such as CDROM or DVD. The connector is not a standard 40-pin IDE connector, instead it has 44 pins providing support for both power and IO signals.
Intel® Server Board S5000PAL / S5000XAL TPS Connector / Header Locations and Pin-outs Table 24.
Intel® Server Board S5000PAL / S5000XAL TPS 5.7.6 Connector / Header Locations and Pin-outs Serial Port Connectors The server board provides one external RJ45 Serial ‘B’ port (J9A2) and one internal 9-pin Serial ‘A’ port header (J1B1). The following tables define the pin-outs for each. Table 26.
Connector / Header Locations and Pin-outs Intel® Server Board S5000PAL / S5000XAL TPS Pin 10 Signal Name P5V_KB_F Description Keyboard / mouse power 11 MS_CLK_F Mouse Clock 12 TP_PS2_12 Test point – keyboard / mouse 13 GND Ground 14 GND Ground 15 GND Ground 16 GND Ground 17 GND Ground 5.7.8 USB 2.0 Connectors The following table details the pin-out of the external USB connectors (J5A1, J6A2) found on the back edge of the server board. Table 29.
Intel® Server Board S5000PAL / S5000XAL TPS 5.8 Connector / Header Locations and Pin-outs Fan Headers The server board incorporates three system fan circuits which support a total of six SSI compliant 4-pin fan connectors. Two fan connectors are designated as processor cooling fans, CPU1 Fan (J9K1) and CPU2 Fan (J5K1). These connectors can support CPU fans that draw a maximum of 1.2 Amps each.
Intel® Server Board S5000PAL / S5000XAL TPS Jumper Block Settings 6. Jumper Block Settings The server board has several 2-pin and 3-pin jumper blocks that can be used to configure, protect, or recover specific features of the server board. Pin 1 on each jumper block is denoted by an “*” or “▼”. 6.1 Recovery Jumper Blocks Table 32.
Intel® Server Board S5000PAL / S5000XAL TPS 6.1.1 Jumper Block Settings CMOS Clear and Password Reset Usage Procedure The CMOS Clear (J1D3) and Password Reset (J1D2) recovery features are designed so that the desired operation can be achieved with minimal system down time. The usage procedure for these two features has changed from previous generation Intel® Server Boards. The following procedure outlines the new usage model. CMOS Clear Procedure: 1. Power down the server; do not remove AC power. 2.
Intel® Server Board S5000PAL / S5000XAL TPS Jumper Block Settings Note: Normal BMC functionality is disabled with the force BMC update jumper set to the “enabled” position. The server should never be run with the BMC force update jumper set in this position and should only be used when the standard firmware update process fails. This jumper should remain in the default – disabled position when the server is running normally. 6.
Intel® Server Board S5000PAL / S5000XAL TPS 6.3 Jumper Block Settings External RJ45 Serial Port Jumper Block The jumper block J8A3, located directly behind the external RJ45 serial port, is used to configure either a DSR or a DCD signal to the connector. J8A3 2 3 4 1-2: DCD to DTR 3-4: DSR to DTR (factory default) TP02303 Figure 19. External RJ45 Serial Port Configuration Jumper Revision 1.
Intel® Server Board S5000PAL / S5000XAL TPS Light Guided Diagnostics 7. Light Guided Diagnostics The server board has several on-board diagnostic LEDs to assist in troubleshooting board level issues. This section shows where each LED is located and provides a high level usage description. For a more detailed description of what drives the diagnostic LED operation, refer to the Intel® S5000 Series Chipsets Server Board Family Datasheet. 7.
Intel® Server Board S5000PAL / S5000XAL TPS 7.2 Light Guided Diagnostics System ID LED and System Status LED The server board provides LEDs for both System ID and System Status. ID LED Status LED TP02309 Figure 21. System ID LED and System Status LED Locations. The blue “System ID” LED can be illuminated using either of two mechanisms. • By pressing the System ID Button on the system control panel the ID LED will display a solid blue color, until the button is pressed again.
Intel® Server Board S5000PAL / S5000XAL TPS Light Guided Diagnostics The bi-color System Status LED will operate as follows: Color Off Green / Amber State N/A Alternating Blink Criticality Not ready Not ready Green Green Solid on Blink System OK Degraded Amber Blink Non-critical Amber Solid on 7.2.1 Critical, nonrecoverable Description AC power off Pre DC Power On – 15-20 second BMC Initialization when AC is applied to the server.
Intel® Server Board S5000PAL / S5000XAL TPS 7.3 Light Guided Diagnostics DIMM Fault LEDs The server board provides a memory fault LED for each DIMM slot. The DIMM fault LED is illuminated when the system BIOS disables the specified DIMM after it reaches a specified number of given failures or if specific critical DIMM failures are detected. See the Intel® S5000 Series Chipsets Server Board Family Datasheet for more details. TP02310 Figure 22. DIMM Fault LED Locations 7.
Intel® Server Board S5000PAL / S5000XAL TPS Light Guided Diagnostics 7.5 Post Code Diagnostic LEDs During the system boot process, BIOS executes a number of platform configuration processes, each of which is assigned a specific hex POST code number. As each configuration routine is started, BIOS will display the given POST code to the POST code diagnostic LEDs found on the back edge of the server board.
Intel® Server Board S5000PAL / S5000XAL TPS Power and Environmental Specifications 8. Power and Environmental Specifications 8.1 Intel® Server Board S5000PAL / S5000XAL Design Specifications Operation of the server board at conditions beyond those shown in the following table may cause permanent damage to the system. Exposure to absolute maximum rating conditions for extended periods may affect system reliability.
Power and Environmental Specifications 8.2 Intel® Server Board S5000PAL / S5000XAL TPS Server Board Power Requirements This section provides power supply design guidelines for a system using the Intel® Server Board S5000PAL / S5000XAL, including voltage and current specifications, and power supply on/off sequencing characteristics. The following diagram shows the power distribution implemented on this server board. Figure 25. Power Distribution Block Diagram 8.2.
Intel® Server Board S5000PAL / S5000XAL TPS 8.2.2 Power and Environmental Specifications Power Supply Output Requirements This section is for reference purposes only. Its intent is to provide guidance to system designers for determining a proper power supply for use with this server board. The contents of this section specify the power supply requirements Intel used to develop a power supply for its 1U server platform.
Intel® Server Board S5000PAL / S5000XAL TPS Power and Environmental Specifications 8.2.4 Grounding The grounds of the pins of the power supply output connector provide the power return path. The output connector ground pins shall be connected to safety ground (power supply enclosure). This grounding should be well designed to ensure passing the maximum allowed Common Mode Noise levels. The power supply shall be provided with a reliable protective earth ground.
Intel® Server Board S5000PAL / S5000XAL TPS 8.2.8 Power and Environmental Specifications Dynamic Loading The output voltages shall remain within limits for the step loading and capacitive loading specified in the table below. The load transient repetition rate shall be tested between 50 Hz and 5 kHz at duty cycles ranging from 10%-90%. The load transient repetition rate is only a test specification. The Δ step load may occur anywhere within the MIN load to the MAX load conditions. Table 38.
Intel® Server Board S5000PAL / S5000XAL TPS Power and Environmental Specifications 8.2.12 Ripple / Noise The maximum allowed ripple/noise output of the power supply is defined in the following table. This is measured over a bandwidth of 0Hz to 20MHz at the power supply output connectors. A 10 μF tantalum capacitor in parallel with a 0.1 μF ceramic capacitor are placed at the point of measurement. Table 40. Ripple and Noise +3.3V 50mVp-p 8.2.
Intel® Server Board S5000PAL / S5000XAL TPS Power and Environmental Specifications Table 41. Output Voltage Timing Item Tvout_rise Tvout_on Description MIN Output voltage rise time from each main output. 5.0 * All main outputs must be within regulation of each other within this time. Tvout_off All main outputs must leave regulation within this time. 1 The 5VSB output voltage rise time shall be from 1.0ms to 25.
Intel® Server Board S5000PAL / S5000XAL TPS Power and Environmental Specifications Table 42. Turn On/Off Timing Item Tsb_on_delay Tac_on_delay Tvout_holdup Tpwok_holdup Tpson_on_delay Tpson_pwok Tpwok_on Tpwok_off Tpwok_low Tsb_vout T5VSB_holdup Description Delay from AC being applied to 5VSB being within regulation. Delay from AC being applied to all output voltages being within regulation. Time all output voltages stay within regulation after loss of AC. Measured at 60% of maximum load.
Intel® Server Board S5000PAL / S5000XAL TPS 8.2.15 Power and Environmental Specifications Residual Voltage Immunity in Standby Mode The power supply shall be immune to any residual voltage placed on its outputs (typically a leakage voltage through the system from standby output) up to 500 mV. There shall be no additional heat generated, nor stress of any internal components with this voltage applied to any individual output, and all outputs simultaneously.
Regulatory and Certification Information 9. Intel® Server Board S5000PAL / S5000XAL TPS Regulatory and Certification Information 9.1 Product Regulatory Compliance Intended Application – This product was evaluated as Information Technology Equipment (ITE), which may be installed in offices, schools, computer rooms, and similar commercial type locations.
Intel® Server Board S5000PAL / S5000XAL TPS 9.2 Regulatory and Certification Information Electromagnetic Compatibility Notices 9.2.1 FCC Verification Statement (USA) This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Intel Corporation 5200 N.E.
Regulatory and Certification Information 9.2.4 Intel® Server Board S5000PAL / S5000XAL TPS BSMI (Taiwan) The BSMI Certification Marking and EMC warning is located on the outside rear area of the product. 9.2.5 RRL (Korea) Following is the RRL certification information for Korea. English translation of the notice above: 1. 2. 3. 4. 5. 80 Type of Equipment (Model Name): On License and Product Certification No.: On RRL certificate.
Intel® Server Board S5000PAL / S5000XAL TPS 9.3 Regulatory and Certification Information Product Ecology Compliance Intel has a system in place to restrict the use of banned substances in accordance with world wide product ecology regulatory requirements. The following is Intel’s product ecology compliance criteria. Compliance Regional Description California Compliance Reference California Code of Regulations, Title 22, Division 4.5; Chapter 33: Best Management Practices for Perchlorate Materials.
Regulatory and Certification Information Compliance Regional Description Intel Internal Specification Intel® Server Board S5000PAL / S5000XAL TPS Compliance Reference All materials, parts and subassemblies must not contain restricted materials as defined in Intel’s Environmental Product Content Specification of Suppliers and Outsourced Manufacturers – Compliance Reference Marking Example None Required http://supplier.intel.com/ehs/environmental.
Intel® Server Board S5000PAL / S5000XAL TPS Appendix A: Integration and Usage Tips Appendix A: Integration and Usage Tips When adding or removing components or peripherals from the server board, AC power must be removed. With AC power plugged into the server board, 5-volt standby is still present even though the server board is powered off. When two processors are installed, both must be of identical revision, core voltage, and bus/core speed.
Appendix B: Sensor Tables Intel® Server Board S5000PAL / S5000XAL TPS Appendix B: BMC Sensor Tables This appendix lists the sensor identification numbers and information regarding the sensor type, name, supported thresholds, assertion and de-assertion information, and a brief description of the sensor purpose. See the Intelligent Platform Management Interface Specification, Version 1.5, for sensor and event/reading-type table information.
Intel® Server Board S5000PAL / S5000XAL TPS Appendix B: Sensor Tables Rearm Sensors - The rearm is a request for the event status for a sensor to be rechecked and updated upon a transition between good and bad states. Rearming the sensors can be done manually or automatically. This column indicates the type supported by the sensor.
Intel® Server Board S5000PAL / S5000XAL TPS Appendix B: Sensor Tables Table 43.
Intel® Server Board S5000PAL / S5000XAL TPS Sensor Name Watchdog Sensor Number 03h System Applicability All Sensor Type Watchdog 2 23h Appendix B: Sensor Tables Event / Reading Type Sensor Specific Event Offset Triggers Timer expired, status only 6Fh Hard reset Criticality Assert / De-assert OK As Readable Value / Offsets – Event Data Rearm Standby Trig Offset A X OK As – Trig Offset A X OK As and De – Trig Offset A X As – Trig Offset A – Power down Power cycle Timer i
Intel® Server Board S5000PAL / S5000XAL TPS Appendix B: Sensor Tables Sensor Name Sensor Number System Event ('System Event') 0Bh BB +1.2V Vtt 10h BB+1.9V NIC Core 11h BB +1.5V AUX 12h BB +1.5V 13h BB +1.8V BB +3.3V 14h 15h BB +3.3V STB 16h BB +1.5V ESB 17h BB +5V 18h BB +1.2V NIC 19h BB +12V AUX 1Ah BB 0.
Intel® Server Board S5000PAL / S5000XAL TPS Sensor Name Sensor Number BB Temp 30h System Applicability All Front Panel Temp 32h All Fan 1A 50h Fan 2A Sensor Type Temperature Event / Reading Type Threshold 01h 01h Temperature Threshold 01h 01h Chassisspecific Fan Threshold 04h 01h 51h Chassisspecific Fan Threshold 04h 01h Fan 3A 52h Chassisspecific Fan Threshold 04h 01h Fan 4A 53h Chassisspecific Fan Threshold 04h 01h Fan 5A 54h Chassisspecific Fan Threshold
Intel® Server Board S5000PAL / S5000XAL TPS Appendix B: Sensor Tables Sensor Name Sensor Number System Applicability Chassisspecific Fan 2 Present 61h Fan 3 Present 62h Chassisspecific Fan 4 Present 63h Chassisspecific Fan 5 Present 64h Chassisspecific Fan 6 Present 65h Chassisspecific Fan 7 Present 66h Chassisspecific Fan 8 Present 67h Chassisspecific Fan 9 Present 68h Chassisspecific Fan 10 Present 69h Chassisspecific Fan Redundancy 6Fh Chassisspecific Sensor Type Fan E
Intel® Server Board S5000PAL / S5000XAL TPS Sensor Name Sensor Number System Applicability Sensor Type Event / Reading Type Appendix B: Sensor Tables Event Offset Triggers Redun degrade from full Criticality Assert / De-assert Readable Value / Offsets Event Data Rearm As and De Standby – Trig Offset A X As and De – Trig Offset A X OK Redun degrade from nonredundant Power Supply Status 1 Power Supply Status 2 Power Nozzle 70h Chassisspecific Power Supply Sensor Specific 08h 6Fh
Intel® Server Board S5000PAL / S5000XAL TPS Appendix B: Sensor Tables Sensor Name Power Gauge V1 rail (+12v) Sensor Number 7Bh System Applicability Chassisspecific Sensor Type Current Event / Reading Type Threshold 03h 01h Chassisspecific Other Units Threshold 0Bh 01h Chassisspecific Other Units Threshold 0Bh 01h All System ACPI Power State 22h Event Offset Triggers Criticality Assert / De-assert [u] [c,nc] Threshold defined As and De Readable Value / Offsets Analog Event Data
Intel® Server Board S5000PAL / S5000XAL TPS Sensor Name Sensor Failure Sensor Number 86h System Applicability All Sensor Type Sensor Failure F6h Event / Reading Type OEM Sensor Specific 73h Appendix B: Sensor Tables Event Offset Triggers I2C device not found Criticality OK Assert / De-assert As Readable Value / Offsets – Event Data Rearm Trig Offset A Standby X 2 I C device error detected 2 I C bus timeout NMI Signal 87h State All OEM C0h Digital Discrete 01h – State asserted OK –
Intel® Server Board S5000PAL / S5000XAL TPS Appendix B: Sensor Tables Sensor Name Sensor Number PCIe Link1 A1h PCIe Link2 A2h PCIe Link3 A3h PCIe Link4 A4h PCIe Link5 A5h PCIe Link6 A6h PCIe Link7 A7h 94 System Applicability Critical Interrupt Sensor Type Sensor Specific 13F 6Fh Critical Interrupt Sensor Specific 13F 6Fh Critical Interrupt Sensor Specific 13F 6Fh Critical Interrupt Sensor Specific 13F 6Fh Critical Interrupt Sensor Specific 13F 6Fh Critical Interrupt Sensor
Intel® Server Board S5000PAL / S5000XAL TPS Sensor Name Sensor Number PCIe Link8 A8h PCIe Link9 A9h PCIe Link10 PCIe Link11 PCIe Link12 PCIe Link13 AAh ABh ACh ADh System Applicability 13F Sensor Type 6Fh Critical Interrupt Sensor Specific 13F 6Fh Critical Interrupt Sensor Specific 13F 6Fh Critical Interrupt Sensor Specific 13F 6Fh Critical Interrupt Sensor Specific 13F 6Fh Critical Interrupt Sensor Specific 13F 6Fh Critical Interrupt Sensor Specific 13F 6Fh Event / R
Intel® Server Board S5000PAL / S5000XAL TPS Appendix B: Sensor Tables Sensor Name Sensor Number Proc 1 Thermal Control C0h Proc 2 Thermal Control C1h Proc 1 VRD Over Temp C8h Proc 2 VRD Over Temp C9h System Applicability All All All 01h 01h Temperature Threshold 01h 01h Temperature Digital Discrete Event Offset Triggers Criticality Assert / De-assert [u] [c,nc] Threshold defined As and De Readable Value / Offsets Analog Event Data Rearm Standby Trig Offset M – [u] [c,nc]
Intel® Server Board S5000PAL / S5000XAL TPS Sensor Name Sensor Number System Applicability Sensor Type 21h DIMM B1 DIMM B2 DIMM C1 DIMM C2 DIMM D1 DIMM D2 E2h E3h E4h E5h E6h E7h All All All All All All Event / Reading Type 6Fh Appendix B: Sensor Tables Event Offset Triggers Criticality Device installed OK Disabled Degraded Sparing OK Slot Connector Sensor Specific Fault status asserted Degraded 21h 6Fh Device installed OK Disabled Degraded Sparing OK Slot Conne
Intel® Server Board S5000PAL / S5000XAL TPS Appendix B: Sensor Tables Sensor Name Sensor Number System Applicability Sensor Type 21h Memory A Error Memory B Error Memory C Error Memory D Error ECh All EEh EFh Systemspecific Systemspecific Systemspecific B0 DIMM Sparing Enabled F0h All B0 DIMM Sparing Redundancy F1h All B1 DIMM Sparing Enabled 98 Event Offset Triggers Criticality Device installed OK Disabled Degraded Assert / De-assert Readable Value / Offsets Event Data Re
Intel® Server Board S5000PAL / S5000XAL TPS Sensor Name B1 DIMM Sparing Redundancy Sensor Number F3h System Applicability All Sensor Type Memory 0Ch Event / Reading Type Discrete 0Bh Appendix B: Sensor Tables Event Offset Triggers Fully redundant Criticality OK Assert / De-assert Event Data Rearm As Readable Value / Offsets – Standby Trig Offset A – Non-red: suff Degraded res from redund Non-red: suff res from insuff res B01 DIMM Mirroring Enabled F4h All B01 DIMM Mirroring Redundanc
Intel® Server Board S5000PAL / S5000XAL TPS Appendix C: POST Code Diagnostic LEDs Appendix C: POST Code Diagnostic LED Decoder During the system boot process, BIOS executes a number of platform configuration processes, each of which is assigned a specific hex POST code number. As each configuration routine is started, BIOS will display the given POST code to the POST Code Diagnostic LEDs found on the back edge of the server board.
Intel® Server Board S5000PAL / S5000XAL TPS Appendix C: POST Code Diagnostic LEDs Table 45.
Appendix C: POST Code Diagnostic LEDs Checkpoint 0x92h Diagnostic LED Decoder G=Green, R=Red, A=Amber MSB LSB R OFF G R Intel® Server Board S5000PAL / S5000XAL TPS Description Detecting the presence of the keyboard 0x93h R OFF G A Enabling the keyboard 0x94h R G OFF R Clearing keyboard input buffer 0x95h R G OFF A Instructing keyboard controller to run Self Test (PS2 only) Mouse (PS2 or USB) 0x98h A OFF OFF R Resetting the mouse 0x99h A OFF OFF A Detecting the mouse 0x9Ah
Intel® Server Board S5000PAL / S5000XAL TPS Checkpoint 0xE7h Diagnostic LED Decoder G=Green, R=Red, A=Amber MSB LSB R A A G Appendix C: POST Code Diagnostic LEDs Description Waiting for user input 0xE8h A R R OFF Checking password 0xE9h A R R G Entering BIOS setup 0xEAh A R A OFF Flash Update 0xEEh A A A OFF Calling Int 19. One beep unless silent boot is enabled.
Appendix D: POST Error Messages and Handling Intel® Server Board S5000PAL / S5000XAL TPS Appendix D: POST Error Messages and Handling Whenever possible, the BIOS will output the current boot progress codes on the video screen. Progress codes are 32-bit quantities plus optional data. The 32-bit numbers include class, subclass, and operation information. The class and subclass fields point to the type of hardware that is being initialized. The operation field represents the specific initialization activity.
Intel® Server Board S5000PAL / S5000XAL TPS Appendix D: POST Error Messages and Handling Error Code 84FF System event log full Error Message Response Pause 8500 Memory Component could not be configured in the selected RAS mode. Pause 8520 DIMM_A1 failed Self Test (BIST). Pause 8521 DIMM_A2 failed Self Test (BIST). Pause 8522 DIMM_A3 failed Self Test (BIST). Pause 8523 DIMM_A4 failed Self Test (BIST). Pause 8524 DIMM_B1 failed Self Test (BIST).
Appendix D: POST Error Messages and Handling Intel® Server Board S5000PAL / S5000XAL TPS POST Error Beep Codes The following table lists POST error beep codes. Prior to system Video initialization, BIOS uses these beep codes to inform users on error conditions. The beep code is followed by a user visible code on POST Progress LEDs. Table 47.
Intel® Server Board S5000PAL / S5000XAL TPS Appendix E: Supported Intel® Server Chassis Appendix E: Supported Intel® Server Chassis The Intel® Server Board S5000PAL / S5000XAL is supported in the following Intel high density rack mount server chassis: • • • Intel® Server Chassis SR1500 Intel® Server Chassis SR1550 Intel® Server Chassis SR2500 This section provides a high level descriptive overview of each chassis.
Appendix E: Supported Intel® Server Chassis Intel® Server Board S5000PAL / S5000XAL TPS A Rack Handles L Riser Card Assembly B SAS/SATA Backplane SAS RAID Battery Pack (Optional) Power Supply Air Duct M System Memory N Processor and Heat Sink O Processor Air Duct Power Distribution Board 1+1 650 Watt Power Supply Modules Intel® Server Board S5000PAL / S5000XAL P H Bridge Board S I Intel RMM Module (Optional) J K C D E F G ® T Intel RMM NIC(Optional) ® U System Fan Bank Mid-plane
Intel® Server Board S5000PAL / S5000XAL TPS Appendix E: Supported Intel® Server Chassis E F D C B A G N H M I L K A J TP02094 A. Rack Handles H. CPU Air Duct B. SAS/SATA Backplane I. System Fan Assembly C. Air Baffles J. Standard Control Panel D. Power Distribution Module 1+1 750 Watt Power Supply Modules Riser Card Assembly K. Flex Bay – 6 HDD or Tape (Optional) L. Five SATA/SAS Hard Drive Bays M. Slim-Line Optical Drive Bay N. Front Bezel (Optional) E. F. G.
Intel® Server Board S5000PAL / S5000XAL TPS Glossary Glossary This appendix contains important terms used in the preceding chapters. For ease of use, numeric entries are listed first (e.g., “82460GX”) with alpha entries following (e.g., “AGP 4x”). Acronyms are then entered in their respective place, with non-acronyms following.
Intel® Server Board S5000PAL / S5000XAL TPS Term IPMI Intelligent Platform Management Interface IR Infrared ITP In-Target Probe KB 1024 bytes Glossary Definition KCS Keyboard Controller Style LAN Local Area Network LCD Liquid Crystal Display LED Light Emitting Diode LPC Low Pin Count LUN Logical Unit Number MAC Media Access Control MB 1024KB MCH Memory Controller Hub MD2 Message Digest 2 – Hashing Algorithm MD5 Message Digest 5 – Hashing Algorithm – Higher Security ms millise
Intel® Server Board S5000PAL / S5000XAL TPS Glossary Term UDP User Datagram Protocol Definition UHCI Universal Host Controller Interface UTC Universal time coordinate VID Voltage Identification VRD Voltage Regulator Down Word 16-bit quantity ZIF Zero Insertion Force 112 Revision 1.
Intel® Server Board S5000PAL / S5000XAL TPS Reference Documents Reference Documents See the following documents for additional information: Intel® S5000 Series Chipsets Server Board Family Datasheet Intel® S5000 Server Board Family BIOS Core External Product Specification (Yellow Cover) Intel® S5000 Server Board Family BMC Core External Product Specification (Yellow Cover) Intel® 5000P Memory Controller Hub External Design Specification (Yellow Cover) Intel® Enterprise South Bridge-2 (ESB