Specifications

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infrastructures. It is purpose built for large backbone cores, with features
enabled for future migration to the backbone edge. The M160 router offers
aggregate route lookup rates in excess of 160 Mpps for wire-rate forwarding
performance and an aggregate throughput exceeding 160 Gbps. It is the first
router to offer a truly concatenated OC-192c/STM-64 PIC with throughput of
10-Gbps full duplex and market-leading port density with up to 32 OC-
48c/STM-16 PICs per chassis or 64 per rack. Its exceptional ASIC design
and production-proven routing software put you in the forefront of next-
generation IP technology.
In September 2000, Juniper Networks launched 2 new platforms : the M5
and M10 Internet Routers. The M10/M5 is a compact, high-performance
routing platform based on the ASIC-based M160/M40/M20 forwarding
architecture (including the Internet Processor II) and JUNOS Internet
software. As an extension of the M160/M40/M20 product line, the M10/M5 is
targeted at a variety of Internet applications, including :
§ high-speed access,
§ public and private peering,
§ content sites,
§ and backbone core networks.
Only 5.25 inches in height, the M10/M5's compact design brings tremendous
performance and port density in very little rack space.
The Internet Processor: Optical-Speed Packet Forwarding
The M-xxx deliver optical-speed forwarding using Juniper-developed, cutting-
edge ASIC designs. The heart of the M-xxx Packet Forwarding Engine (PFE) is
the Internet Processor. With over one million gates, the Internet Processor
represents the largest route look-up ASIC ever implemented on a router platform.
Providing a lookup rate of over 40 million packets per second, the Internet
Processor is also the fastest route lookup engine on the market today, capable of
processing data for throughput rates in excess of 40 gigabits per second (Gbps).
The Internet Processor also features prefix accounting mechanisms at rates in
excess of 20 Mpps.
All lookup rates reflect longest-match route table lookups for all packets and all
lookups are performed in hardware. There is no caching mechanism – and hence
no risk of cache misses — in the system. In addition, the forwarding table can be
updated without affecting forwarding rates. The Internet Processor is
programmable to support up to four different forwarding tables — layer 2 and/or
layer 3 — simultaneously. Supported forwarding protocols currently include IPv4
(unicast and multicast) and MPLS. Finally, the Internet Processor maintains its
performance regardless of length of lookups or table size. As Internet bandwidth
demand grows, the Internet Processor and PFE architecture will be the
fundamental building block for future Juniper platforms.
Nov. 1999Nov. 1999
M20M20
Sept. 1998Sept. 1998
M40M40
Mar. 2000Mar. 2000
M160
M160
Sept. 2000
Sept. 2000
M5
M5
Sept. 2000Sept. 2000
M10M10