Specifications

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In addition to ASICs, there is a 200 MHz PowerPC 603e processor that manages
the link between the RE and PFE, manages forwarding table updates, manages
ASICs and environmental systems and controls craft interface.
The RE which is an Intel-based Compact PCI platform has a 233 Mhz Pentium
processor. Note that this is used only for routing functions only and not for packet
forwarding.
2.5.2 Differences between the M20 and the M40
The Routing Engines between the M20 and M40 differ in form factor, CPU (PII-
333 vs. Pentium 200), and memory (768 MB vs. 256 MB). The software and
functionality in the platform is exactly the same. On the packet forwarding engine
the M20 uses the SSB (System and Switch Board) while the M40 uses the SCB
(System Control Board). Both platforms share a common set of ASIC’s, and
layout and form factor changes have been made for size and architecture
(midplane vs. backplane) considerations, but the functionality remains exactly the
same. The Distributed buffer manager ASICs are located on the System and
Switch Board on the M20, while it is located on the midplane on the M40.
Logical View of the M20
PIC
FPC
I/O
Mgr
PD
out
PD
in
PIC
PIC
PIC
Shared
RAM
PIC
FPC
I/O
Mgr
PD
out
PD
in
PIC
PIC
PIC
Shared
RAM
PIC
FPC
I/O
Mgr
PD
out
PD
in
PIC
PIC
PIC
Shared
RAM
PIC
FPC
I/O
Mgr
PD
out
PD
in
PIC
PIC
PIC
Shared
RAM
PIC
FPC
I/O
Mgr
PD
out
PD
in
PIC
PIC
PIC
Shared
RAM
PIC
FPC
I/O
Mgr
PD
out
PD
in
PIC
PIC
PIC
Shared
RAM
PIC
FPC
I/O
Mgr
PD
out
PD
in
PIC
PIC
PIC
Shared
RAM
PIC
FPC
I/O
Mgr
PD
out
PD
in
PIC
PIC
PIC
Shared
RAM
SSB
Internet
Processor II
Distributed
Buffer Managers
SSB : System & Switch Board
Logical View of the M40
SCB
PIC
FPC
I/O
Mgr
PD
out
PD
in
PIC
PIC
PIC
Shared
RAM
PIC
FPC
I/O
Mgr
PD
out
PD
in
PIC
PIC
PIC
Shared
RAM
PIC
FPC
I/O
Mgr
PD
out
PD
in
PIC
PIC
PIC
Shared
RAM
PIC
FPC
I/O
Mgr
PD
out
PD
in
PIC
PIC
PIC
Shared
RAM
PIC
FPC
I/O
Mgr
PD
out
PD
in
PIC
PIC
PIC
Shared
RAM
PIC
FPC
I/O
Mgr
PD
out
PD
in
PIC
PIC
PIC
Shared
RAM
PIC
FPC
I/O
Mgr
PD
out
PD
in
PIC
PIC
PIC
Shared
RAM
PIC
FPC
I/O
Mgr
PD
out
PD
in
PIC
PIC
PIC
Shared
RAM
Internet
Processor II
Distributed
Buffer Managers
SCB : System Control Board
2.5.3 Internal Architecture of the M160
The two key components of the M160 architecture are the Packet Forwarding
Engine (PFE) and the Routing Engine, which are connected via a 100-Mbps link.
The PFE is responsible for packet forwarding performance. It consists of the
Flexible PIC Concentrators (FPCs), PICs, Switching and Forwarding Modules
(SFMs), and state-of-the-art ASICs.