User's Manual

Page 50 of 83

A Carrier Corp. Company

PART NUMBER T82002163

REV A

Software must monitor the nMSINS interrupt. When an interrupt occurs due to the removal of the

memory stick, the software must halt all MHSC activity and reset the memory stick host controller.

Reset

The memory stick host controller is reset in either of two ways:

•

Any PXA27x processor reset causes all of the MSHC registers to be reset.

•

Setting MSCRSR[RST] causes the memory stick host controller to enter and remain in reset

until MSCRSR[RST] is cleared. In this case, all of the registers except for the RST bit are

reset, and the output signals BS, SDIO, and SCLK are driven low. Any currently-executing

protocol is terminated when MSCRSR[RST] is asserted.

These methods do not cause a reset TPC to be sent to the Memory Stick.

Note: Before writing any of the control registers for a new bus protocol, always set MSCRSR[RST] and

then clear it.

Power-Save Mode

When the memory stick is not being used, software may optionally place it into a low-power mode.

This is controlled entirely by software and is not related in any way to the PXA27x processor lowpower

modes.

Figure 17-2 shows how to enter and exit the Memory Stick power-save mode. To maximize overall

system power saving, software must place the Memory Stick in power-save mode prior to entering

any of the system low-power modes.