Technical data

Displaying Reference Data
14.1 Overview of the Available Reference Data
Programming with STEP 7
Manual, 05/2010, A5E02789666-01 315
Example
The following example shows the typical layout of an assignment list for inputs, outputs, and bit
memory (I/Q/M).
The first row shows the assignment of input byte IB 0. Inputs for address IB 0 are accessed directly
(bit access). The columns "0", "1", "2", "3", "5", and "6" are identified with "X" for bit access.
There is also word access to memory bytes 1 and 2, 2 and 3 or 4 and 5. For this reason, a "bar" is
shown in the "W" column, and the cells also have a light blue background. The black tip of the bar
shows the start of word access.
T/C Table
Each row displays 10 timers or counters.
Example
0 1 2 3 4 5 6 7 8 9
T 00-09 . T1 . . . T6 . . .
T 10-19 . . T12 . . . . T17 . T19
T 20-29 . . . . T24 . . . . .
Z 00-09 . . Z2 . . . . Z7 . .
Z 10-19 . . . . . . . . . Z19
Z 20-29 . . . . . . . . . .
Z 30-39 . . . . Z34 . . . . .
In this example, the timers T1, T6, T12, T17, T19, T24 and the counters Z2, Z7, Z19, Z34 are
occupied.
The lists are sorted alphabetically. You can arrange the entries by clicking on the column title.