User's Manual
Table Of Contents
- GENERAL INFORMATION AND REQUIREMENTS
- INTRODUCTION
- EQUIPMENT DESCRIPTION
- Electronics Cabinet
- Local Control Unit (LCU) (1A1)
- Synthesizer Assembly (1A3A1, 1A3A11)
- Audio Generator CCA (1A3A2, 1A3A9)
- Monitor CCA (1A3A3, 1A3A10)
- Low Voltage Power Supply (LVPS) CCA (1A3A4, 1A3A8)
- Test Generator CCA (1A3A5)
- Remote Monitoring System (RMS) Processor CCA ( 1A3A6)
- Facilities CCA (1A3A7)
- Sideband Amplifier Assembly (1A4A1, 1A4A2, 1A4A6, 1A4A7)
- RF Monitor Assembly (1A4A4)
- Commutator Control CCA (1A4A5)
- Battery Charging Power Supply (BCPS) Assembly (1A5A1, 1A5A2)
- Carrier Power Amplifier Assembly (1A5A3, 1A5A4)
- Interface CCA (1A9)
- AC Power Monitor Assembly (1A6)
- Commutator CCA (1A10, 1A11)
- Portable Maintenance Data Terminal (PMDT)
- Transmitting Antenna System
- Field Monitor Antenna
- Counterpoise
- Equipment Shelter
- Battery Backup Unit (Optional)
- Electronics Cabinet
- EQUIPMENT SPECIFICATION DATA
- EQUIPMENT AND ACCESSORIES SUPPLIED
- OPTIONAL EQUIPMENT
- TECHNICAL DESCRIPTION
- INTRODUCTION
- OPERATING PRINCIPLES
- DVOR TRANSMITTER THEORY OF OPERATION
- Simplified System Block Diagram
- System Block Diagram Theory
- Frequency Synthesizer (1A3A1, 1A3A11)
- Audio Generator CCA (1A7, 1A23) Theory
- Audio Generator CCA Detailed Circuit Theory
- CSB Power Amplifier Assembly (1A5A3, 1A5A4)
- Bi-Directional Coupler (1DC1)
- Sideband Generator Assembly (1A4A1, 1A4A2, 1A4A6, 1A5A7)
- RF Monitor Assembly (1A4A4) Theory
- RF Monitor Assembly Block Diagram Theory
- RMS Processor Block Diagram Theory
- Facilities CCA Theory
- Interface CCA Theory
- Interface CCA Block Diagram Theory
- AC Power Monitor CCA Theory
- Local Control Unit Theory
- Local Control Unit Block Diagram Theory
- DC to DC Converter
- Power Fail Detectors
- Key Switch Registers
- Parallel Interface
- 1.8432MHz Oscillator/Divider Chains
- Positive Alarm Register
- Negative Alarm Register
- 20 Second Delay Counter
- LCU Transfer Control State Machine #1 and #2 and Discrete Controls
- LED Control
- Audible Alarm
- Monitor Alarm Interface
- Station Control Logic
- System Configuration Inputs
- Local Control Unit Block Diagram Theory
- Test Generator (1A3A5) CCA Theory
- Low Voltage Power Supply (1A3A4, 1A3A8) CCA Theory
- Monitor CCA (1A3A3, 1A3A9) Theory
- Power Panel Theory
- Battery Charger Power Supply (BCPS) Theory
- Battery Charger Detailed Circuit Theory
- Extender Board Block Diagram Theory
- Commutator Control CCA Theory
- Commutator CCA (1A10, 1A11) Theory
- PMDT (PORTABLE MAINTENANCE DATA TERMINAL (UNIT 2)
- BATTERIES (UNIT 3)
- FIELD MONITOR KIT (UNIT 4)
- OPERATION
- INTRODUCTION
- REMOTE CONTROL STATUS UNIT (RCSU)
- REMOTE STATUS UNIT (RSU)
- REMOTE STATUS DISPLAY UNIT (RSDU)
- PORTABLE MAINTENANCE DATA TERMINAL (PMDT)
- PMDT SCREENS
- General
- Menus
- System Status at a Glance - Sidebar Status and Control
- Screen Area
- Configuring the PMDT
- Connecting to the VOR
- RMS Screens
- Monitor Screens
- All Monitor Screens
- Monitor 1 & 2 Screens
- Transmitter Data Screens
- Transmitter Configuration Screens
- Transmitter Commands
- Diagnostics Screen
- Controlling the Transmitter via the PMDT
- RMM
- CONTROLS AND INDICATORS
- POWER CONTROL PANEL
- LOCAL CONTROL UNIT (LCU)
- BCPS Asssembly Assembly (1A5A3, 1A5A4)
- Carrier Amplifier Assembly (1A5A3, 1A5A4)
- Monitor CCA (1A3A3, 1A3A10)
- Remote Monitoring System (RMS) CCA
- Facilities CCA (1A3A7)
- Synthesizer CCA (1A3A1, 1A3A11)
- Sideband Generator Assembly (1A4A1, 1A4A2, 1A4A5, 1A4A6)
- Audio Generator CCA (1A3A2, 1A3A9)
- Low Voltage Power Supply (LVPS) CCA (1A3A4,1A3A8)
- Test Generator CCA (1A3A5)
- RF Monitor Assembly (1A4A4)
- STANDARDS AND TOLERANCES
- PERIODIC MAINTENANCE
- MAINTENANCE PROCEDURES
- INTRODUCTION
- PERFORMANCE CHECK PROCEDURES
- Battery Backup Transfer Performance Check
- Carrier Output Power Performance Check
- Carrier Frequency Performance Check
- Monitor 30 Hz and 9960 Hz Modulation Percentage and Deviation Ratio Performance Check
- Modulation Frequency Performance Check
- Antenna VSWR Performance Check
- Automatic Transfer Performance Checks (Dual Equipment only)
- VOR Monitor Performance Check
- Monitor Integrity Test of VOR Monitor (Refer to Section 3.6.8.2.2)
- RSCU Operation Performance Check
- Identification Frequency and Modulation Level Checks
- EQUIPMENT INSPECTION PROCEDURES
- ALIGNMENT PROCEDURES
- Battery Charging Power Supply (BCPS) Alignment Procedures
- Alarm Volume Adjustment Procedure
- RMS Facilities Exterior and Interior Temperature Calibration
- Reassign Main/Standby Transmitters (Dual Systems Only)
- Verification of BITE VSWR Calibration
- Verification of BITE Frequency Counter Calibration
- Verification of BITE Wattmeter Calibration
- RMS Lithium Battery Check Procedure
- Replacing RMS CPU (1A3A6) CCA
- Update of DVOR Software
- Changing the Station Rotation (Azimuth)
- Changing the Monitoring Offsets
- DME Keying Check
- DVOR Frequency Synthesizer Alignment
- DVOR Sideband Amplifier Alignment
- Antenna VSWR Check for New Frequency
- CORRECTIVE MAINTENANCE
- PARTS LIST
- INSTALLATION, INTEGRATION, AND CHECKOUT
- INTRODUCTION
- SITE INFORMATION
- UNPACKING AND REPACKING
- INPUT POWER REQUIREMENT SUMMARY
- INSTALLATION PROCEDURES
- Tools and Test Equipment Required
- Counterpoise and Shelter Foundation Installation
- Shelter Installation
- Counterpoise Installation
- Initial Conditions
- Sideband Antenna Installation
- Carrier Antenna Installation
- Installation of Field Monitor Antenna
- Antenna Cable Exterior Cable Entrance Installation
- Air Conditioner Installation
- Transmitter Cabinet Installation
- Battery Back Up Installation
- DC Voltage and Battery Installation
- AC Voltage Installation
- Connecting DME Keyer Wiring
- RCSU and RMM Connections
- Obstruction Light Installation and Wiring
- Cutting Antenna Cables to Proper Electrical Length
- Tuning the Antennas
- Sideband RF Feed Cables to Commutator Connections
- INSPECTION
- INITIAL STARTUP AND PRELIMINARY TESTING
- Input Voltage Checks
- Installing Modules in Transmitter Cabinet
- Turn on Procedure
- PMDT Hookup and Setup
- Site Adjustments and Configurations
- DVOR Station Power-Up
- Log-On Procedure
- Setting Date and Time
- Setting Station's Descriptor
- Password Change
- Setting System Configuration
- Transmitter Tuning Procedures
- Setting Transmitter Operating Parameters
- Setting Monitor Alarm Limits
- Setting Monitor Az Angle Low Limit
- Setting Monitor Az Angle High Limit
- Setting High Monitor 30 Hz Mod Low Limit
- Setting Monitor 30 Hz Mod High Limit
- Setting Monitor 9960 Hz Mod Low Limit
- Setting Monitor 9960 Hz Mod High Limit
- Setting Monitor 9960 Hz Dev Low Limit
- Setting Monitor 9960 Hz Dev High Limit
- Setting Monitor Field Intensity Low Limit
- Setting Monitor Field Intensity High Limits
- Records
- INSTALLATION VERIFICATION TEST
- SOFTWARE
- TROUBLESHOOTING SUPPORT
Model 1150A DVOR
Rev. - November, 2008
This document contains proprietary information and such information may not be disclosed
to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
2-55
2.3.2.17.2
Monitor CCA Detailed Circuit Theory
The microcontroller used on the Monitor CCA is in a product category called digital signal processor (DSP) that
utilizes external flash ROM, non-volatile RAM (NVRAM), synchronous dynamic RAM (SDRAM), a voltage
supervisor/watchdog reset circuit, and an oscillator to form the core microcomputer. The DSP also includes a direct
memory access (DMA) controller, serial ports, and general purpose input/output (I/O). Microcomputer peripherals
include a real-time clock (RTC), universal asynchronous receiver/transmitters (UARTs), a parallel port interface
(PPI), bus buffers, and more general purpose I/O.
RF
Switch
U31
4 pole BPF
fo=113MHz
BW=20MHz
Gain=-2.6dB
1st LO
(Transmit Frequency-45MHz)
+17dBm
45 MHz IF
MX2
Level 10
44.875MHz
Crystal Oscillator
10dBm
From Y4, U42
ADC
fs=400KHz
U24
125 KHz IF
Slave DSP
U75
Pin=+10dBm
to -35dBm
Op Amp
U20
Gain=10.2dB
Crystal Filter
4 pole
fo=45 MHz
BW=30KHz
LNA
U43
Gain=22dB
LNA
U38
Gain=22dB
Pin=-2dBm
Vref=1V
-3dB
Synth IC
U30
TCXO
U36
Loop Filter
C100,C104, R33
Buffer/
Amp
U34
VCO
Y2-
LNA
LNA
Synthesizer
Digital
Attenuator
5 bit, 32 dB
Field Monitor 1
Field Monitor 2
Selectable
0/-16dB Attenuator
U32,U33,U35
L4 thru L6
MX1
Y3
U40
U61
Gain= 22 dB
U60
Gain= 22 dB
Figure 2-21 Monitor Receiver, Block Diagram
The U6 DSP is one of two DSPs on the Monitor CCA. The U6 DSP utilizes external flash ROMs (U1 and U2) that
contain the operating instructions for the DSP. The U6 DSP utilizes NVRAM (U3) that retains settings even without
power applied to the Monitor CCA. The U6 DSP also uses SDRAM (U5) for temporary storage and execution
RAM. The U6 DSP program instructions are loaded from the flash memory U1 and U2 at power up and then run out
of internal RAM within the U6 DSP or in the slower SDRAM (U5). The U6 DSP includes internal, direct memory
access (DMA) controller, serial ports, and general purpose input/output (I/O).
The U6 DSP’s flash ROM is factory programmed using the J1 SPI boot header while factory debug is accomplished
using the J8 emulator header, and the J9 debug header. These connectors and headers are not be used after factory
testing is completed.
Buffer circuits U8, U9, U11, U12, and U13 are used to buffer the U6 address and data lines for use within the
Monitor circuit card.