User's Manual

Model 1150A DVOR
2-52 Rev. - November, 2008
This document contains proprietary information and such information may not be disclosed
to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
The VCO_EN signal from connector P2:C7 is filtered by inductor L5 and routed out connector P2:C9 as signal
VCO_PWR.
+48VDC, which originates at connector P2:C26, sources Zener CR11 through current-limit resistors R18 and R19 to
create a precision +10VDC that can be measured at TP10. The precision +10VDC powers “window” comparators
U5:A and U5:B; which compare the +5VDC voltage at U5-4 and U5-7 to the trip points established by resistors
R21, R22, and R23 at U5-5 and U5-6.
The precision +10VDC also powers “window” comparators U5:C and U5:D; which compare the +12VDC scaled by
resistors R24 and R25 at U5-8 and U5-11 to the trip points established by resistors R21, R22, and R23 at U5-9 and
U5-10.
The precision +10VDC also powers “window” comparators U6:A and U6:B; which compare the +28VDC scaled by
resistors R30 and R32 at U6-4 and U6-7 to the trip points established by resistors R21, R22, and R23 at U6-5 and
U6-6.
The precision +10VDC also powers “window” comparators U6:C and U6:D; which compare the -12VDC scaled by
resistors R31 and R33 at U6-8 and U6-11 to the trip points established by resistors R27, R28, and R29 at U6-9 and
U6-10.
As long as the +5VDC, +12VDC, +28VDC, and -12VDC supplies are within the “window” trip points; the U5-2,
U5-1, U5-14, U5-13, U6-2, U6,-1, U6-14, and U6-13 comparator outputs will be pulled-up to +10VDC through
resistor R26; turning on both transistors Q3 and Q4. Transistor Q3 turned on lights the CR12 PWR_OK LED
through current-limit resistor R35 and voltage-limit zener diode CR13. Transistor Q4 turned on pulls the
~LVPS_OK signal low, assuming a pull-up resistor after connector P2:A7 at the Facilities CCA.
If any of the +5VDC, +12VDC, +28VDC, and -12VDC supplies go above or below the “window” trip points, both
transistors Q3 and Q4 will shut off; darkening the CR12 PWR_OK LED and causing the ~LVPS_OK signal to go
high, assuming a pull-up resistor after connector P2:A7 at the Facilities CCA.
The ~TEST signal from connector P2:B8, when active low, is guaranteed to light the CR12 PWR_OK LED through
diode CR14. Zener diodes CR15 and CR16 provide over-voltage protection to both the ~TEST and ~LVPS_OK
signals.
2.3.2.17
Monitor CCA (1A3A3, 1A3A9) Theory
The Monitor CCA amplifies the RF input from the field monitor antenna, band pass filters and analyzes the signals
from the field monitor antennas. The parametric data is displayed on the PMDT and the Monitor CCA initiates an
alarm status indication to the LCU if the DVOR fails to operate within specified limits.
2.3.2.17.1
Monitor CCA Block Diagram Theory
Refer to Figure 2-20. The monitor CCA is a circuit card assembly designed to monitor and analyze the radiated
signal from the DVOR. The monitor checks the monitored signal against the high and low limits and generates the
alarm status signals to the LCU if the DVOR fails to operate within specified limits. The Monitor CCA is inserted
into the rack which provides the RF connection to the monitor antenna, power input, alarm signals to the LCU and
serial communication to the RMS processor.
The DVOR monitors are designed for dual operation in either AND or OR configuration with both monitors
checking the signal from the field monitor antenna. The DVOR field monitor is normally connected with one
antenna connected to an RF signal splitter that feeds the two Monitors. Operation with two monitor antennas
connected to each monitor can be provided as an option.
Refer to Figure 2-21. The antenna is connected to the backplane connector of the Monitor on the DIN female J2
connector. The input is 50 ohms and will accept an input of +10 dBm to -50 dBm.