User's Manual
Table Of Contents
- GENERAL INFORMATION AND REQUIREMENTS
- INTRODUCTION
- EQUIPMENT DESCRIPTION
- Electronics Cabinet
- Local Control Unit (LCU) (1A1)
- Synthesizer Assembly (1A3A1, 1A3A11)
- Audio Generator CCA (1A3A2, 1A3A9)
- Monitor CCA (1A3A3, 1A3A10)
- Low Voltage Power Supply (LVPS) CCA (1A3A4, 1A3A8)
- Test Generator CCA (1A3A5)
- Remote Monitoring System (RMS) Processor CCA ( 1A3A6)
- Facilities CCA (1A3A7)
- Sideband Amplifier Assembly (1A4A1, 1A4A2, 1A4A6, 1A4A7)
- RF Monitor Assembly (1A4A4)
- Commutator Control CCA (1A4A5)
- Battery Charging Power Supply (BCPS) Assembly (1A5A1, 1A5A2)
- Carrier Power Amplifier Assembly (1A5A3, 1A5A4)
- Interface CCA (1A9)
- AC Power Monitor Assembly (1A6)
- Commutator CCA (1A10, 1A11)
- Portable Maintenance Data Terminal (PMDT)
- Transmitting Antenna System
- Field Monitor Antenna
- Counterpoise
- Equipment Shelter
- Battery Backup Unit (Optional)
- Electronics Cabinet
- EQUIPMENT SPECIFICATION DATA
- EQUIPMENT AND ACCESSORIES SUPPLIED
- OPTIONAL EQUIPMENT
- TECHNICAL DESCRIPTION
- INTRODUCTION
- OPERATING PRINCIPLES
- DVOR TRANSMITTER THEORY OF OPERATION
- Simplified System Block Diagram
- System Block Diagram Theory
- Frequency Synthesizer (1A3A1, 1A3A11)
- Audio Generator CCA (1A7, 1A23) Theory
- Audio Generator CCA Detailed Circuit Theory
- CSB Power Amplifier Assembly (1A5A3, 1A5A4)
- Bi-Directional Coupler (1DC1)
- Sideband Generator Assembly (1A4A1, 1A4A2, 1A4A6, 1A5A7)
- RF Monitor Assembly (1A4A4) Theory
- RF Monitor Assembly Block Diagram Theory
- RMS Processor Block Diagram Theory
- Facilities CCA Theory
- Interface CCA Theory
- Interface CCA Block Diagram Theory
- AC Power Monitor CCA Theory
- Local Control Unit Theory
- Local Control Unit Block Diagram Theory
- DC to DC Converter
- Power Fail Detectors
- Key Switch Registers
- Parallel Interface
- 1.8432MHz Oscillator/Divider Chains
- Positive Alarm Register
- Negative Alarm Register
- 20 Second Delay Counter
- LCU Transfer Control State Machine #1 and #2 and Discrete Controls
- LED Control
- Audible Alarm
- Monitor Alarm Interface
- Station Control Logic
- System Configuration Inputs
- Local Control Unit Block Diagram Theory
- Test Generator (1A3A5) CCA Theory
- Low Voltage Power Supply (1A3A4, 1A3A8) CCA Theory
- Monitor CCA (1A3A3, 1A3A9) Theory
- Power Panel Theory
- Battery Charger Power Supply (BCPS) Theory
- Battery Charger Detailed Circuit Theory
- Extender Board Block Diagram Theory
- Commutator Control CCA Theory
- Commutator CCA (1A10, 1A11) Theory
- PMDT (PORTABLE MAINTENANCE DATA TERMINAL (UNIT 2)
- BATTERIES (UNIT 3)
- FIELD MONITOR KIT (UNIT 4)
- OPERATION
- INTRODUCTION
- REMOTE CONTROL STATUS UNIT (RCSU)
- REMOTE STATUS UNIT (RSU)
- REMOTE STATUS DISPLAY UNIT (RSDU)
- PORTABLE MAINTENANCE DATA TERMINAL (PMDT)
- PMDT SCREENS
- General
- Menus
- System Status at a Glance - Sidebar Status and Control
- Screen Area
- Configuring the PMDT
- Connecting to the VOR
- RMS Screens
- Monitor Screens
- All Monitor Screens
- Monitor 1 & 2 Screens
- Transmitter Data Screens
- Transmitter Configuration Screens
- Transmitter Commands
- Diagnostics Screen
- Controlling the Transmitter via the PMDT
- RMM
- CONTROLS AND INDICATORS
- POWER CONTROL PANEL
- LOCAL CONTROL UNIT (LCU)
- BCPS Asssembly Assembly (1A5A3, 1A5A4)
- Carrier Amplifier Assembly (1A5A3, 1A5A4)
- Monitor CCA (1A3A3, 1A3A10)
- Remote Monitoring System (RMS) CCA
- Facilities CCA (1A3A7)
- Synthesizer CCA (1A3A1, 1A3A11)
- Sideband Generator Assembly (1A4A1, 1A4A2, 1A4A5, 1A4A6)
- Audio Generator CCA (1A3A2, 1A3A9)
- Low Voltage Power Supply (LVPS) CCA (1A3A4,1A3A8)
- Test Generator CCA (1A3A5)
- RF Monitor Assembly (1A4A4)
- STANDARDS AND TOLERANCES
- PERIODIC MAINTENANCE
- MAINTENANCE PROCEDURES
- INTRODUCTION
- PERFORMANCE CHECK PROCEDURES
- Battery Backup Transfer Performance Check
- Carrier Output Power Performance Check
- Carrier Frequency Performance Check
- Monitor 30 Hz and 9960 Hz Modulation Percentage and Deviation Ratio Performance Check
- Modulation Frequency Performance Check
- Antenna VSWR Performance Check
- Automatic Transfer Performance Checks (Dual Equipment only)
- VOR Monitor Performance Check
- Monitor Integrity Test of VOR Monitor (Refer to Section 3.6.8.2.2)
- RSCU Operation Performance Check
- Identification Frequency and Modulation Level Checks
- EQUIPMENT INSPECTION PROCEDURES
- ALIGNMENT PROCEDURES
- Battery Charging Power Supply (BCPS) Alignment Procedures
- Alarm Volume Adjustment Procedure
- RMS Facilities Exterior and Interior Temperature Calibration
- Reassign Main/Standby Transmitters (Dual Systems Only)
- Verification of BITE VSWR Calibration
- Verification of BITE Frequency Counter Calibration
- Verification of BITE Wattmeter Calibration
- RMS Lithium Battery Check Procedure
- Replacing RMS CPU (1A3A6) CCA
- Update of DVOR Software
- Changing the Station Rotation (Azimuth)
- Changing the Monitoring Offsets
- DME Keying Check
- DVOR Frequency Synthesizer Alignment
- DVOR Sideband Amplifier Alignment
- Antenna VSWR Check for New Frequency
- CORRECTIVE MAINTENANCE
- PARTS LIST
- INSTALLATION, INTEGRATION, AND CHECKOUT
- INTRODUCTION
- SITE INFORMATION
- UNPACKING AND REPACKING
- INPUT POWER REQUIREMENT SUMMARY
- INSTALLATION PROCEDURES
- Tools and Test Equipment Required
- Counterpoise and Shelter Foundation Installation
- Shelter Installation
- Counterpoise Installation
- Initial Conditions
- Sideband Antenna Installation
- Carrier Antenna Installation
- Installation of Field Monitor Antenna
- Antenna Cable Exterior Cable Entrance Installation
- Air Conditioner Installation
- Transmitter Cabinet Installation
- Battery Back Up Installation
- DC Voltage and Battery Installation
- AC Voltage Installation
- Connecting DME Keyer Wiring
- RCSU and RMM Connections
- Obstruction Light Installation and Wiring
- Cutting Antenna Cables to Proper Electrical Length
- Tuning the Antennas
- Sideband RF Feed Cables to Commutator Connections
- INSPECTION
- INITIAL STARTUP AND PRELIMINARY TESTING
- Input Voltage Checks
- Installing Modules in Transmitter Cabinet
- Turn on Procedure
- PMDT Hookup and Setup
- Site Adjustments and Configurations
- DVOR Station Power-Up
- Log-On Procedure
- Setting Date and Time
- Setting Station's Descriptor
- Password Change
- Setting System Configuration
- Transmitter Tuning Procedures
- Setting Transmitter Operating Parameters
- Setting Monitor Alarm Limits
- Setting Monitor Az Angle Low Limit
- Setting Monitor Az Angle High Limit
- Setting High Monitor 30 Hz Mod Low Limit
- Setting Monitor 30 Hz Mod High Limit
- Setting Monitor 9960 Hz Mod Low Limit
- Setting Monitor 9960 Hz Mod High Limit
- Setting Monitor 9960 Hz Dev Low Limit
- Setting Monitor 9960 Hz Dev High Limit
- Setting Monitor Field Intensity Low Limit
- Setting Monitor Field Intensity High Limits
- Records
- INSTALLATION VERIFICATION TEST
- SOFTWARE
- TROUBLESHOOTING SUPPORT
Model 1150A DVOR
Rev. - November, 2008
This document contains proprietary information and such information may not be disclosed
to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
2-15
The RF signal is attenuated after the U1 amplifier and sent through a phase shift network similar to the phase shift
n
etworks in the carrier CCA (012263). The phase shifter provides a fine adjustment for the carrier to sideband
phase relationship. The phase shifter provides a minimum of +/- 45 degrees of phase shift. The control signal for
the phase shifter is amplified through U2:B. Filtering is done through R5, C8, R11, and C10. Resistors R13 - R15
provide a resistive load for the phase shifter. The RF signal is then applied to U5, which is a bi-phase modulator.
The bi-phase modulator is used with U4 to provide a 180 degree phase shift from the reference input on pin 4 of U5.
This allows a single digital bit for 180 degrees of adjustment referenced to the carrier signal. The signal is applied
to HY1 attenuated and to U6. HY1 is a coupler that is used to provide a 90 degree phase shift to the RF signal. U6
is an RF switch used to switch either the 0 degree path or the 90 degree path with resistive attenuation to provide a
load to the coupler.
The RF signal is then routed to an amplifier U7 and a resistive power splitter. The signal is split to an upper and
lower sideband path. Both sideband paths are identical with the exception the upper sideband disables the DC
power to quadrature modulator U8 in a CVOR system configuration. This accomplished through R47, Q1, R48, and
Q2. Since both sideband paths are identical, only the lower sideband path will be discussed.
The lower sideband path is attenuated and routed to the quadrature modulator U14. The quadrature modulator uses
the 9960 Hz audio signal generated from the DDS, U17 on the 012262 CCA within the synthesizer assembly. There
are two 9960 Hz signals that are 90 degrees apart fed into the I/Q ports of U14. This allows carrier and sideband
suppression, leaving only the desired sideband for the output signal. Depending if the in-phase (I) signal is +90 or -
90 degrees with respect to the quadrature (Q) signal, the output signal will yield the upper or lower sideband
respectively. The phase shift is controlled by the DDS on the 012262 CCA within the synthesizer assembly.
In a CVOR system configuration, the DDS from the 012262 CCA provides only a differential DC signal to the
quadrature modulator in order to pass only the carrier frequency to the lower sideband out without any modulation.
The quadrature modulators provide the sideband output that becomes the reference frequency for the clean-up loop.
The clean-up loop is there to filter out the undesired frequency components generated by the quadrature modulators.
From the quadrature modulators the signal is routed to a buffer amplifier and then to a comparator circuit to generate
a square signal from a sine wave input. You will notice in the block diagram above that the FPGA block has the
same U9 reference designator for each of the upper and lower sidebands. This is because the upper and lower
sideband signals are routed to the same FPGA. Each signal is then treated independently inside the FPGA. The
FPGA serves as the PLL controller for each of the sideband signals while also providing frequency monitor outputs
that are a sample of the output frequency divided by 2560. This signal is used in the VOR system to provide
monitoring capability of the sideband frequencies. The FPGA has tri-state outputs that are connected to loop filters
(U27, U29). The loop filters drive the VCO circuits for each of the upper and lower sideband channels. A sample
of the output frequency is split to provide a sample back to the FPGA for the phase control and a sample provided to
a detector for monitoring the output power of each of the sideband signals. The output voltage of the detector is
proportional to the input RF power.
2.3.2.2
Audio Generator CCA (1A7, 1A23) Theory
2.3.2.2.1Audio Generator CCA Block Diagram Theory
Refer to Figure 2-8. The Audio Generator CCA is responsible for supplying the audio signal to the carrier amplifier,
sourcing four modulated sideband outputs for a DVOR or two modulated sideband outputs for a CVOR, making two
bi-phase outputs to the sideband amplifier, generating six DVOR commutator switching control lines, and
programming the Synthesizer CCA frequency, phase, and DDS (9960 Hz) signals. In addition, the Audio Generator
CCA monitors carrier forward / reflected powers, up to four sideband forward / reflected powers, phase locks of the
synthesizer and sideband amplifiers, and frequency lock of the synthesizer.