User's Manual

Model 1150A DVOR
Rev. - November, 2008
This document contains proprietary information and such information may not be disclosed
to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
2-67
2.3.2.22.1
Commutator Control CCA Block Diagram Theory
Refer to Figure 2-26. The Commutator Control CCA processes all signal steering for antennas 1 through 48.
Commutator switch control signals from the Audio Generator CCA are applied through connectors P1 and P2 to a
differential line receiver circuit on the Commutator Control CCA. The line receiver circuit which consists of line
receivers U5A, U5B, U5C, U5D, U6A, and U6B converts the differential signals to TTL signal levels.
From the line receiver circuit the control signals are applied to programmable logic device (PLD) U4. PLD U4
performs decoding and distribution of the antenna and transfer signals.
To simplify discussion, only the odd antenna operation shall be discussed.
The output of PLD U4 is applied to a level converter circuit which consists of U7A, U7B, U7C, and U7D. This
circuit converts the antenna select data, which is referenced to TTL levels, to logic levels referenced at -10V to +5
VDC. The output of this circuit is applied to a 4:16 line decoder U12.
PLD U4 also outputs signals to a transfer generation circuit which consists of amplifiers U17A, U17B and
transistors Q2, Q3, Q4 and Q1. The outputs of the transfer circuit are the ODD and NOT ODD XFR signals. These
are opposite polarity CMOS logic signals that change state every 1/60th of a second.
U12 decodes the antenna select data code to select one of the twelve outputs used in the 48 antenna system. The
remaining outputs of U12 are not used. The twelve output lines are normally HIGH (+5 volts). When selected, it is
pulled LOW (-10 volts). Each output line is applied to a display driver circuit which consists of drivers U8 through
U11, U13 through U16, and U18 through U21. This circuit provides the necessary drive to operate the odd
numbered antenna RF signal switching pin diodes (after exiting through connectors P1 and P2) on the upper
Commutator CCA. Refer to Table 2-1.
Ground check switch control signals from the Monitor CCA through connectors P1 and P2 are applied to a
differential line receiver circuit on the Commutator Control CCA. The line receiver circuit, which consists of line
receivers U3A, U3B, U3C and U3D, converts the differential signals to the TTL signal levels.
Automatic ground check may be user enabled to verify operation of the DVOR. The ground check feature is
normally disabled. If enabled, the TTL level ground check signals will be added as an offset inside of PLD U4.
Refer to Table 2-2.
Memory EEPROM U38 and optional temperature sensor U39 may be accessed by the RMS CCA via SPI I/O port
U40. The EEPROM U38 may be used to store system parameters as well as revision / serial number information.
Comparators U43 and U44 monitor the +3.3V, +5V, +12V, and -12V supplies to verify they are within range and
light LED CR34 if so. Power status may also be read by the RMS CCA via the SPI I/O port U40.