User's Manual

MODEL 2130 MARKER BEACON
2-18 Rev. A April, 2005
This document contains proprietary information and such information may not be disclosed to others for any
purposes without written permission from SELEX Sistemi Integrati Inc.
The alarm signals from the monitors have already been given the appropriate transfer delay times within the monitors.
This results in an immediate transfer when the combinatorial requirements of the alarm signals are met. When a transfer
condition occurs, the present transmitter that is connected to the antenna system is taken off the air. The other
transmitter is connected to the antenna system, and turned on (if it is not already on). If the transmitter, not designated as
main connected to the antenna system when the transfer condition occurs, the control logic will enter the shutdown state
and both transmitters are turned off. Once the control logic enters the shutdown state, no further transfer operations will
take
place until a local operator or the RMS turns one of the transmitters on and specifies that it is connected to the antenna
system. The Station Control Logic controls which transmitter is connected to the antenna system by the status of the
+12V ANT outputs. In order to insure the state of the antenna transfer relay, a status signal is returned from it. This
signal is monitored by the RMS through the parallel interface at Bits 0 and 1 of address 83 (hex).
2.3.3.2.6 Aural Alarm
An aural alarm is turned on when the system control logic senses an alarm condition as reported by the monitors. The
frequency for the alarm is obtained from U3. It is the 1.832 MHZ divided by 512 which is 3600 Hz. The signal is also
inverted by U3. The inverted and non-inverted 3600 Hz signals are both gated by U3. The two outputs of U3 provide a
differential signal to drive piezoelectric alarm element LS1. The system control logic turns the alarm on by asserting the
active low ~ALARM signal. When the ~ALARM signal is at an inactive or high logic level, the outputs of both U3 will
be high which will result in no differential signal to drive the alarm. The level of the signal is adjusted by R43. R44
prevents the adjustment of R43 to result in a level which is too low.
2.3.3.2.7 System Configuration Inputs
In order to reduce the amount of effort required to program various modules within the Marker for the proper
configuration, there are eight logic signals that are sent from the RMS to each module to specify the system
configuration. The configuration signals are readable by the RMS via hex address 86.
The logic signals are produced by switches on the RMS. Isolation is provided in the event power is lost to the LCU. The
resistors in RN9 pull the inputs to U1 to a high logic level if the configuration inputs are high.
2.3.3.2.8 Clock Oscillator and Divider
Clock signals are necessary for the operation of the sequential circuitry within the two EPLDs U1 and U3. The output of a
1.8432 MHZ oscillator Y1 is sent to U3. U3 divides the oscillator frequency by 16384 to produce a 450 Hz clock signal.
Within U3, the 450 Hz clock is divided by 45 to produce another 10 Hz clock. The 450 Hz clock and the 10 Hz clock are
both used by U1 and U3. The divide by 512 output of U3 is used to provide 3600 Hz for the aural alarm for the LCU.
2.3.3.2.9 Reset and Watchdog Circuitry
A reset circuit U9 is used to provide a reset signal to the LCU logic circuitry when it is powered up or in the event that the
3.3V power supply voltage falls below a threshold. The LCU control logic uses the reset to set the system control logic to
a safe operational state. The alarm bypasses are turned off, the main transmitter is set to #1 and other settings within the
logic are set to a default state. As long as the reset is asserted the transmitter off signals are asserted. When the reset
returns to its non-asserted state, the LCU waits to be configured before any transmitter is turned on and is connected to
the antenna. Immediately after reset, the RMS must update the control settings within the LCU since the default settings
such as monitor enables, Hot Standby and the And/Or selection may not be desired. A pushbutton switch S14 allows the
operator to manually reset the system through the LCU. R34 pulls the MR (pin 1) input to its inactive high state. When
S14 is pushed, the Master Reset signal is asserted low causing U9 to generate a reset within the LCU at the same time the
rest of the system is driven into a reset condition.
A watchdog circuit within U9 monitors the internal 10 Hz clock and de-asserts the transmitter enable signals in the event
that the clock oscillator or the clock dividing circuitry fails. The 10 Hz clock signal is connected to the WDI input of U9.
If the clock fails to toggle for 1.6 seconds, the ~WDO output will go active. Logic within EPLD's U1 and U3 will then
assert the ~OFF1 and ~OFF2 signals to the monitor which will then turn off both Marker Beacon transmitters.