User's Manual

After a system reset, all the alarm latch outputs will are in the active state until updated by the DSP. The

alarms are updated only when the DSP refreshes the voltage supervisor / watchdog. If there is a DSP

failure, the alarms will remain in the last output state until watchdog time-out and the voltage supervisor /

watchdog reset activates the alarms. During normal operation, the alarm outputs are read by the DSP using

an input buffer to verify them. The LEDs are used to signal the alarms and pre-alarms conditions on the

front panel and the external ~TEST signal coming from the LCU can light all LEDs to verify they have not

failed.

The debug RS232 port is used only for factory purposes and will not be used by the customer in the field.

The 10MHz temperature-controlled crystal oscillator (TCXO) provides an accurate and reliable source of

timing for the digital circuitry and the Interrogator sections.

The PLD is decoded into the DSP memory map. The PLD has complex circuitry for a programmable

interrogator. The interrogator is enabled half of the time by the INT_EN_U signal coming from the LCU.

When enabled, the interrogator uses a digital-to-analog converter (DAC) to generate interrogation pulses to

the Interrogator board, which modulates and sends it to the RTCs. Simultaneously; the monitor

interrogation is demodulated and sent to an analog-to-digital converter (ADC 1) via the MON_DET_INT

signal. Once this sampling is finished, the interrogator controller switches to the ANT_DET_REPLY

source or the STDBY_DET_REPLY source to complete the sampling with the reply from one RTC. The

sampling is then shared with the DSP to measure the parameters.

The PLD uses the DONE signal to alert DSP once the sampled signal is ready. While the interrogator is

disabled, the PLD sends a complete waveform with two interrogations pulses and two reply pulses through

the DAC to ADC 1 by the CERT_SIGNAL to certify the alarm limits and the measurement circuitry. Also

LOG_DET_MEAS is used to measure the antenna forward or reflected power while the interrogator is

disabled, selecting with the FWD/~RFL~_CTRL signal. The digital attenuator in the ANT_DET_REPLY

signal is used to verify the alarm limits in the output power.

Since interrogator controls the synthesizer frequency of the RF board, it has the ability to change the

frequency in real time and mix normal interrogations with out-of-frequency interrogations. The Monitor

uses this capability to measure the RTCs rejection of out-of-frequency interrogations. The attenuation of

each sample from the DAC can be controlled through the INT_ATT_CTRL signal.

Two BNC connectors are on the front panel. The INT_TRIGGER signal is the trigger for an oscilloscope

and the INT_TRIGGER_U signal is the source. The PMDT can select which interrogations to display and

the PLD triggers the oscilloscope when the selected type is been sent.

The ANT_DET_REPLY and STDBY_DET_REPLY contain only the shape of the reply pulses. These

signals along with the CERT_SIGNAL go through comparators to form square-waves. The square-waves

are used by the PLD to measure the pulse-rate frequency and the efficiency. The TX1_ANT indicates

which RTC is connected to the antenna. TX1_ID and TX2_ID signals are asserted when each RTC is

emitting identification pulses. With these signals and both the antenna and standby reply’s, the PLD can

monitor the identification code and frequency of both RTCs. An AUDIO_ID signal is also generated by the

PLD to hear the Morse identification code of the DME.

The signal INT_F0 is the monitor’s synthesizer signal divided by 2

. This signal is used by the DSP to

measure the frequency of the synthesizer. The same types of signals come from the DME transmitters and

receivers. All of these signals are multiplexed by the PLD to the DSP timer to be measured. The monitor’s

synthesizer signal is also available on the monitor’s front panel to be measured externally.

When working in TACAN mode, North and Aux Burst signals are used in conjunction with the peak-hold

circuit and ADC 2 to measure 15 / 135 Hz modulation depth and phase accuracy. The North and Aux

Trigger and Delay are used to measure the North and Aux Burst delay and length. There are no hardware

differences between the DME and TACAN monitors; only the DSP software and PLD firmware are