Service Manual

• Block Diagram
~
MULT
(/)
::l
co
(/)
(/)
LU
CPU
v-- a:
(/)
-~
CACHE TAG
1:==1 §_~
::l
co
<(
i
LU-_/
1-
::r:
<(
A
C)
0
<(
LU
C)
::r:
EXCEPTION
~
C)
PROCESS
<(
C)
INTERRUPT
-
..J
~(I
CACHE
CONTROLLER
-
<(
CONTROLLER
z
"
u;
16-bit
1-
I
K=1
l=REE-RUNNING
0...
::l
TIMER
a:
ffi
h
1-
;;
~ k
(/)
..J ::l
<(
co
v
z
(/)
CACHE
BREAK
a:
(/)
SERIAL
LU
LU
DATA
()=~
CONTROLLER
1-
a:
COMMUNI-
;;
0
~
CATIONS
0
1'-'
<(
INTERFACE
co
..J
(/)
::l
~i
~
<(
co
a:
<(
<(
LU
0 ::r:
1-
..J
0...
<(
<(
VECTOR ADDRESS
a:
0
z
LU
DIVU
1-~
a:
0...
..J
WATCH DOG
LU
~-§y
1-
<(
TIMER
z
a:
..J
::r:
<(
0...
z
a:
a:
LU
I I
LU
~
1-
BUS STATE
0...
DIRECT
_____/
;;
CONTROLLER
-
MEMORY
ACCESS
CONTROLLER
r--;
OpERATION
(X2 CHANNELS)
MODE
CONTROLLER
OSCILLATOR
""'/
""'-/
EXTERNAL BUS
INTERFACE
0 0
-35-