Datasheet
Table Of Contents
- Product Overview
- 1 ESP32-C3 Series Comparison
- 2 Pin Definition
- 3 Functional Description
- 3.1 CPU and Memory
- 3.2 System Clocks
- 3.3 Analog Peripherals
- 3.4 Digital Peripherals
- 3.4.1 General Purpose Input / Output Interface (GPIO)
- 3.4.2 Serial Peripheral Interface (SPI)
- 3.4.3 Universal Asynchronous Receiver Transmitter (UART)
- 3.4.4 I2C Interface
- 3.4.5 I2S Interface
- 3.4.6 Remote Control Peripheral
- 3.4.7 LED PWM Controller
- 3.4.8 General DMA Controller
- 3.4.9 USB Serial/JTAG Controller
- 3.4.10 TWAI® Controller
- 3.5 Radio and Wi-Fi
- 3.6 Bluetooth LE
- 3.7 Low Power Management
- 3.8 Timers
- 3.9 Cryptographic Hardware Accelerators
- 3.10 Physical Security Features
- 3.11 Peripheral Pin Configurations
- 4 Electrical Characteristics
- 5 Package Information
- 6 Related Documentation and Resources
- Revision History
memory, external memory, and peripherals
– External memory encryption and decryption
• Rich set of peripheral interfaces and GPIOs,
ideal for various scenarios and complex
applications
Features
WiFi
• IEEE 802.11 b/g/n-compliant
• Supports 20 MHz, 40 MHz bandwidth in 2.4
GHz band
• 1T1R mode with data rate up to 150 Mbps
• Wi-Fi Multimedia (WMM)
• TX/RX A-MPDU, TX/RX A-MSDU
• Immediate Block ACK
• Fragmentation and defragmentation
• Transmit opportunity (TXOP)
• Automatic Beacon monitoring (hardware TSF)
• 4 × virtual Wi-Fi interfaces
• Simultaneous support for Infrastructure BSS in
Station mode, SoftAP mode, Station + SoftAP
mode, and promiscuous mode
Note that when ESP32-C3 scans in Station mode,
the SoftAP channel will change along with the
Station channel
• Antenna diversity
• 802.11mc FTM
• Supports external power amplifier
Bluetooth
• Bluetooth LE: Bluetooth 5, Bluetooth mesh
• High power mode (18 dBm)
• Speed: 125 Kbps, 500 Kbps, 1 Mbps, 2 Mbps
• Advertising extensions
• Multiple advertisement sets
• Channel selection algorithm #2
• Internal co-existence mechanism between Wi-Fi
and Bluetooth to share the same antenna
CPU and Memory
• 32-bit RISC-V single-core processor, up to 160
MHz
• CoreMark
®
score:
– 1 core at 160 MHz: 407.22 CoreMark; 2.55
CoreMark/MHz
• 384 KB ROM
• 400 KB SRAM (16 KB for cache)
• 8 KB SRAM in RTC
• Embedded flash (see details in Chapter 1
ESP32-C3 Series Comparison)
• SPI, Dual SPI, Quad SPI, and QPI interfaces that
allow connection to multiple external flash
• Access to flash accelerated by cache
• Supports flash in-Circuit Programming (ICP)
Advanced Peripheral Interfaces
• 22 or 16 programmable GPIOs
• Digital interfaces:
– 3 × SPI
– 2 × UART
– 1 × I2C
– 1 × I2S
– Remote control peripheral, with 2 transmit
channels and 2 receive channels
– LED PWM controller, with up to 6 channels
– Full-speed USB Serial/JTAG controller
– General DMA controller (GDMA), with 3
transmit channels and 3 receive channels
– 1 × TWAI
®
controller compatible with ISO
11898-1 (CAN Specification 2.0)
• Analog interfaces:
Espressif Systems 3
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ESP32-C3 Series Datasheet v1.2