Datasheet

Table Of Contents
3 Functional Description
3.7 Low Power Management
With the use of advanced power-management technologies, ESP32-C3 can switch between different power
modes.
Active mode: CPU and chip radio are powered on. The chip can receive, transmit, or listen.
Modem-sleep mode: The CPU is operational and the clock speed can be reduced. Wi-Fi base band,
Bluetooth LE base band, and radio are disabled, but Wi-Fi and Bluetooth LE connection can remain active.
Light-sleep mode: The CPU is paused. Any wake-up events (MAC, host, RTC timer, or external interrupts)
will wake up the chip. Wi-Fi and Bluetooth LE connection can remain active.
Deep-sleep mode: CPU and most peripherals are powered down. Only the RTC memory is powered on.
Wi-Fi connection data are stored in the RTC memory. The RTC timer or the RTC GPIOs can wake up the
chip from the Deep-sleep mode.
For power consumption in different power modes, please refer to Table 17.
3.8 Timers
3.8.1 General Purpose Timers
ESP32-C3 is embedded with two 54-bit general-purpose timers, which are based on 16-bit prescalers and
54-bit auto-reload-capable up/down-timers.
The timers’ features are summarized as follows:
a 16-bit clock prescaler, from 1 to 65536
a 54-bit time-base counter programmable to be incrementing or decrementing
able to read real-time value of the time-base counter
halting and resuming the time-base counter
programmable alarm generation
level interrupt generation
3.8.2 System Timer
ESP32-C3 integrates a 52-bit system timer, which has two 52-bit counters and three comparators. The system
timer has the following features:
counters with a fixed clock frequency of 16 MHz
three types of independent interrupts generated according to alarm value
two alarm modes: target mode and period mode
52-bit target alarm value and 26-bit periodic alarm value
automatic reload of counter value
counters can be stalled if the CPU is stalled or in OCD mode
Espressif Systems 27
Submit Documentation Feedback
ESP32-C3 Series Datasheet v1.2