Datasheet
Table Of Contents
- Product Overview
- 1 ESP32-C3 Series Comparison
- 2 Pin Definition
- 3 Functional Description
- 3.1 CPU and Memory
- 3.2 System Clocks
- 3.3 Analog Peripherals
- 3.4 Digital Peripherals
- 3.4.1 General Purpose Input / Output Interface (GPIO)
- 3.4.2 Serial Peripheral Interface (SPI)
- 3.4.3 Universal Asynchronous Receiver Transmitter (UART)
- 3.4.4 I2C Interface
- 3.4.5 I2S Interface
- 3.4.6 Remote Control Peripheral
- 3.4.7 LED PWM Controller
- 3.4.8 General DMA Controller
- 3.4.9 USB Serial/JTAG Controller
- 3.4.10 TWAI® Controller
- 3.5 Radio and Wi-Fi
- 3.6 Bluetooth LE
- 3.7 Low Power Management
- 3.8 Timers
- 3.9 Cryptographic Hardware Accelerators
- 3.10 Physical Security Features
- 3.11 Peripheral Pin Configurations
- 4 Electrical Characteristics
- 5 Package Information
- 6 Related Documentation and Resources
- Revision History
3 Functional Description
MHz in STR mode.
• SPI2 Generalpurpose SPI (GPSPI) mode
When SPI2 acts as a general-purpose SPI, it can operate in master and slave modes. SPI2 supports
two-line full-duplex communication and single-/two-/four-line half-duplex communication in both master
and slave modes. The host’s clock frequency is configurable. Data are transferred in unit of byte. The clock
polarity (CPOL) and phase (CPHA) are also configurable. The SPI2 interface can connect to GDMA.
– In master mode, the clock frequency is 80 MHz at most, and the four modes of SPI transfer format are
supported.
– In slave mode, the clock frequency is 60 MHz at most, and the four modes of SPI transfer format are
also supported.
The mapping between SPI bus signals and GPIO pins is shown in Table 8:
Table 8: Mapping of SPI Signals and Chip Pins
FullDuplex HalfDuplex Chip Pin Signal
SPI Signal SPI Signal Pin Function FSPI Signals
MOSI MOSI D FSPID
MISO (MISO) Q FSPIQ
CS CS CS FSPICS0 ~ 5
CLK CLK CLK FSPICLK
— — WP FSPIWP
— — HD FSPIHD
In most cases, the data port connection between ESP32-C3 and external flash is as follows:
Table 9: Connection Between ESP32C3 and External Flash
External Flash Data Port
Chip Pin SPI SingleLine Mode SPI TwoLine Mode SPI FourLine Mode
SPID (SPID) DI IO0 IO0
SPIQ (SPIQ) DO IO1 IO1
SPIWP (SPIWP) WP# — IO2
SPIHD (SPIHD) HOLD# — IO3
3.4.3 Universal Asynchronous Receiver Transmitter (UART)
ESP32-C3 has two UART interfaces, i.e. UART0 and UART1, which support IrDA and asynchronous
communication (RS232 and RS485) at a speed of up to 5 Mbps. The UART controller provides hardware flow
control (CTS and RTS signals) and software flow control (XON and XOFF). Both UART interfaces connect to
GDMA via UHCI0, and can be accessed by the GDMA controller or directly by the CPU.
3.4.4 I2C Interface
ESP32-C3 has an I2C bus interface which is used for I2C master mode or slave mode, depending on your
configuration. The I2C interface supports:
• standard mode (100 Kbit/s)
Espressif Systems 22
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ESP32-C3 Series Datasheet v1.2