Datasheet

Electrical characteristics STM32WLE5J8/JB/JC
120/135 DS13105 Rev 4
5.3.24 Comparator characteristics
ENOB
Effective number of
bits
DAC output buffer ON, CL  50 pF, RL  5 k,
1 kHz
-11.4-
bits
DAC output buffer OFF, CL  50 pF, no RL,
1 kHz
-11.5-
1. Guaranteed by design.
2. Difference between two consecutive codes - 1 LSB.
3. Difference between measured value at code i and the value at code i on a line drawn between code 0 and last code 4095.
4. Difference between the value measured at code (0x001) and the ideal value.
5. Difference between the ideal slope of the transfer function and the measured slope computed from code 0x000 and 0xFFF
when buffer is OFF, and from code giving 0.2 V and (V
REF+
– 0.2) V when buffer is ON.
Table 80. DAC accuracy
(1)
(continued)
Symbol Parameter Conditions Min Typ Max Unit
Table 81. COMP characteristics
(1)
Symbol Parameter Conditions Min Typ Max Unit
V
DDA
Analog supply voltage - 1.62 - 3.6
VV
IN
Comparator
input voltage range
-0-V
DDA
V
BG
(2)
Scaler input voltage - V
REFINT
V
SC
Scaler offset voltage - - ±5 ±10 mV
I
DDA
(SCALER)
Scaler static consumption
from V
DDA
BRG_EN = 0 (bridge disabled) - 200 300 nA
BRG_EN = 1 (bridge enabled) - 0.8 1 µA
t
START_SCALER
Scaler startup time - - 100 200 µs
t
START
Comparator startup time
to reach propagation
delay specification
High-speed
mode
V
DDA
 2.7 V - - 5
µs
V
DDA
< 2.7 V - - 7
Medium mode
V
DDA
 2.7 V - - 15
V
DDA
< 2.7 V - - 25
Ultra-low-power mode - - 40
t
D
(3)
Propagation delay with
100 mV overdrive
High-speed
mode
V
DDA
 2.7 V - 55 80
ns
V
DDA
< 2.7 V - 55 100
Medium mode - 0.55 0.9
µs
Ultra-low-power mode - 4 7
V
offset
Comparator offset error Full common mode range - ±5 ±20 mV
V
hys
Comparator hysteresis
No hysteresis - 0 -
mV
Low hysteresis - 8 -
Medium hysteresis - 15 -
High hysteresis - 27 -