Datasheet

DS13105 Rev 4 103/135
STM32WLE5J8/JB/JC Electrical characteristics
127
Table 67. I/O static characteristics
Symbol Parameter Conditions Min Typ Max Unit
V
IL
I/O input low-level voltage
(1)
1.8 V < V
DD
< 3.6 V
- - 0.3 x V
DD
V
I/O input low-level voltage
(2)
0.39 x V
DD
- 0.06
V
IH
I/O input high-level voltage
(1)
0.7 x V
DD
--
I/O input high-level voltage
(2)
0.49 x V
DD
+ 0.26
--
V
hys
TT_xx, FT_xxx and NRST
I/O input hysteresis
- 200 - mV
I
lkg
FT_xx input leakage current
0  V
IN
 Max(V
DDXXX
)
(3)
- - ±100
nA
Max(V
DDXXX
)  V
IN

Max(V
DDXXX
) +1 V
(2)(3)(4)
- - 650
Max(V
DDXXX
) +1 V < V
IN

5.5 V
(2)(3)(4)(5)(6)
- - 200
(7)
FT_lu, FT_u and PC3 IO
input leakage current
0  V
IN
 Max(V
DDXXX
)
(3)
- - ±150
Max(V
DDXXX
)  V
IN

Max(V
DDXXX
) +1 V
(2)(3)
- - 2500
Max(V
DDXXX
) +1 V < V
IN

5.5 V
(1)(3)(4)(8)
- - 250
TT_xx
input leakage current
V
IN
 Max(V
DDXXX
)
(3)
- - ±150
Max(V
DDXXX
)  V
IN
< 3.6 V
(3)
- - 2000
R
PU
Weak pull-up equivalent
resistor
(1)
V
IN
= V
SS
25 40 55
k
R
PD
Weak pull-down equivalent
resistor
(1)
V
IN
= V
DD
25 40 55
C
IO
I/O pin capacitance - - 5 - pF
1. Tested in production.
2. Guaranteed by design, not tested in production.
3. Represents the pad leakage of the I/O itself. The total product pad leakage is given by
I
Total_Ileak_max
= 10 A + number of I/Os where V
IN
is applied on the pad x I
lkg(Max)
.
4. Max(V
DDXXX
) is the maximum value among all the I/O supplies.
5. V
IN
must be lower than [Max(V
DDXXX
) + 3.6 V].
6. Refer to the figure below.
7. To sustain a voltage higher than [Min(V
DD
, V
DDA
) + 0.3 V], the internal pull-up and pull-down resistors must be disabled on
all FT_xx I/O, except FT_lu, FT_u and PC3.
8. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS, whose
contribution to the series resistance is minimal (~10 %).