Datasheet

SH1107
60
DC-DC
Below application circuit is an example for the input voltage of 3V AVDD to generate Vpp of about 15V@10mA-25mA
application
DC-DC
AVDD
(2.4~3.5)
C1
VSS
VBREF
VSS
VSS
VSS
L
D
Q
C2
C3
C4
C5
AVDD
(2.4~3.5)
R1
R2
R3
R4
Vpp
SENSE
FB
SW
Figure 19
Symbol Value Recommendation
L
10μH
D SCHOTTKY DIODE 20V@0.5A, MBR0520
Q MOSFET N-FET with low
RDS(ON),MGSF1N02LT1
R1 1.1M 1%,1/8W
R2 100K 1%,1/8W
R3 0.12 1%,1/2W
R4 10K 1%,1/8W
C1
22μF
Ceramic/16V
C2
0.1μF
Ceramic/16V
C3
10μF
Low ESR/16V
C4 56pF Ceramic/16V
C5 220pF Ceramic/16V
Note: R4&C5 are optional; they can increase the efficiency of inductance