Datasheet

SH1107
59
4. I
2
C Interface (Internal oscillator, External VPP, Max 16.5V)
VDD
VCL
VSS
VSL
AVDD
SW
FB
SENSE
VBREF
IM0
IM1
IM2
D7 - D2
CL
CLS
VCOMH
VPP
IREF
+
VDD
C1
C2
C3
External Vpp
R1
D1
D0
SDA
SCL
+
+
No used,keep floating or fix
all to VSS or VDD
SH1107
SA0
Fix to
VSS or
VDD
Rp
Rp
RD
WR
RES
RES
CS
Figure 18-4
Note:
C1---C3:4.7μF
R1: Recommend 750KΩ (Refer to the table8 )
The least significant bit of the slave address is set by connecting the input SA0 to either logic 0(VSS) or 1(VDD)
The positive supply of pull-up resistor must equal to the value of VDD
Recommend the value of resistor Rp equal to 1.5 KΩ