Datasheet

SH1107
4
System Bus Connection Pads
Pad NO. Symbol I/O Description
48 CL I/O
This pad is the system clock input. When internal clock is enabled, this pad should be
Left open. The internal
clock is output from this pad. When internal oscillator is disabled, this pad
receives display clock signal from external clock source.
33 CLS I
This is the internal clock enable pad.
CLS = “H”: Internal oscillator circuit is enabled.
CLS = “L”: Internal oscillator circuit is disabled (require external input).
When CLS = “L”, an external clock source must be connected to the CL pad for normal operation.
36
38
40
IM0
IM1
IM2
I
These are the MPU interface mode select pads.
8080 I
2
C 6800 4-wire SPI 3-wire SPI
IM0 0 0 0 0 1
IM1 1 1 0 0 0
IM2 1 0 1 0 0
49
CS
I
This pad is the chip select input. When
CS
= “L”, then the chip select becomes active,
and data/command I/O is enabled.
50
RES
I
This is a reset signal input pad. When
RES
is set to “L”, the settings are initialized. The reset
operation is performed by the
RES
signal level.
51
A0
（SA0）
I
This is the Data/Command control pad that determines whether the data bits are data or a
command.
A0 = “H”: the inputs at D0 to D7 are treated as display data.
A0 = “L”: the inputs at D0 to D7 are transferred to the command registers.
In I
2
C interface, this pad serves as SA0 to distinguish the different address of OLED driver.
52
WR
(
WR/
)
I
This is a MPU interface input pad.
When connected to an 8080 MPU, this is active LOW. This pad connects to the 8080 MPU
WR
signal. The signals on the data bus are latched at the rising edge of the
WR
signal.
When connected to a 6800 Series MPU: This is the read/write control signal input terminal.
When
WR/
= “H”: Read.
When
WR/
= “L”: Write.
53
RD
(E)
I
This is a MPU interface input pad.
When connected to an 8080 series MPU, it is active LOW. This pad is connected to the
RD
signal
of the 8080 series MPU, and the data bus is in an output status when this signal is “L”.
When connected to a 6800 series MPU, this is active HIGH. This is used as an enable clock
input
of the 6800 series MPU.
54-61
D0 - D7
(SCL)
(SI/SDA)
I/O
I
I/O
This is an 8-bit bi-directional data bus that connects to an 8-bit or 16-bit standard MPU data bus.
When the serial interface is selected, then D0 serves as the serial clock input pad (SCL) and D1
serves as the serial data input pad (SI). At this time, D2 to D7 are set to high impedance.
When the I
2
C interface is selected, then D0 serves as the serial clock input pad (SCL) and D1
serves as the serial data input pad (SDA). At this time, D2 to D7 are set to high impedance.
47 FRM O
This pad is No Connection pad, Its signal varies with the frame frequency. Its
voltage is equal to
VDD when the last common output of every frame is active, and is equal to Vss during other time.