Datasheet
SH1107
17
The Column Address Circuit
As shown in Figure 10, the display data RAM column address is specified by the Column Address Set command. The specified
column address or page address (it depends on the mode of RAM addressing) is incremented (+1) with each display data read/
write command. This allows the MPU display data to be accessed continuously. Because the column address is independent of
the page address, when moving, for example, from page0 column 7FH to page 1 column 00H in page addressing mode, it is
necessary to re-specify both the page address and the column address.
The Display Address Circuit
The display address circuit, as shown in Figure 10, specifies the display address relating to the common output when the
contents of the display data RAM are displayed. (This is the COM0 output when the common output mode is normal and the
COM127 output for SH1107 when the common output mode is reversed. The display area is a 128-line area for the SH1107
from the first display address. As shown in Table 8, the common driver direction select command can be used to reverse the
relationship between the display data RAM display address and the common output.
Table 8
Common Output
Scan Direction
COM0
… COM127
D= “0” 0 (H) à
Display Address
à 7F (H)
D= “1” 7F (H) ß
Display Address
ß 0 (H)