Datasheet

SH1107
13
I
2
C-bus Interface
The SH1107 can transfer data via a standard I
2
C-bus and has slave mode only in communication. The command or RAM data
can be written into the chip and the status and RAM data can be read out of the chip.
Table 7
Note: “-” pin must always be HIGH or LOW. D7~ D2 is recommended to connect the VDD or VSS. It is also allowed to leave D7~
D2 unconnected.
CS
Signal could always pull low in I
2
C-bus application.
Characteristics of the I
2
C-bus
The I
2
C-bus is for bi-directional, two-line communication between different ICs or modules. The two lines are a serial data line
(SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor. Data transfer may
be initiated only when the bus is not busy.
Note: The positive supply of pull-up resistor must equal to the value of VDD.
Bit Transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period of the
clock pulse as changes in the data line at this time will be interpreted as a control signal.
SDA
SCL
Data line stable:
Data valid
Change data
allowed
Figure 5 Bit Transfer
IM0 IM1 IM2 Type
CS
A0
RD
WR
D0 D1 D2 to D7
0 1 0
I
2
C Interface
Pull Low SA0 - - SCL SDA (Hz)