Datasheet

Table Of Contents
...........continued
AMODE[1:0] Name Description
0x2 RANGE The slave responds to the range of addresses between and including ADDR
and ADDRMASK. ADDR is the upper limit
0x3 - Reserved
Bit 13 – MSSEN Master Slave Select Enable
This bit enables hardware Slave Select (SS) control.
Value Description
0
Hardware SS control is disabled.
1
Hardware SS control is enabled.
Bit 9 – SSDE Slave Select Low Detect Enable
This bit enables wake-up when the Slave Select (SS) pin transitions from high to low.
Value Description
0
SS low detector is disabled.
1
SS low detector is enabled.
Bit 6 – PLOADEN Slave Data Preload Enable
Setting this bit will enable preloading of the Slave Shift register when there is no transfer in progress. If
the SS line is high when DATA is written, it will be transferred immediately to the Shift register.
Bits 2:0 – CHSIZE[2:0] Character Size
CHSIZE[2:0] Name Description
0x0 8BIT 8 bits
0x1 9BIT 9 bits
0x2-0x7 - Reserved
SAM D5x/E5x Family Data Sheet
SERCOM SPI – SERCOM Serial Peripheral Interface
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 990