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loaded into the FIFO as Byte zero and data begins with Byte 1. INTFLAGS.RXC will then be raised for
every 4 Bytes transferred. For transmit, there is a 32-bit holding buffer in the core domain. Once DATA
has been registered in the core domain, INTFLAG.DRE will be raised, so that the next 32 bits can be
written to the DATA register.
Figure 35-10. 32-bit Extension Slave Operation
Byte 0
ADDRESS
S
W
RXC interrupt
S
W
RXC interrupt
Byte 1
Byte 2
Byte 3
When utilizing the length counter, the LENGTH register must be written before the frame begins. If the
frame length while SS is low is not a multiple of LENGTH.LEN Bytes, the Length Error Status bit
(STATUS.LENERR) is raised. If LENGTH.LEN is not a multiple of 4 Bytes, the final INTFLAG.RXC
interrupt will be raised when the last Byte is received.
The length count is based on the received Bytes, or the number of clocks if the receiver is not enabled. If
pre-loading is disabled and DATA is written to for transmit before SCK starts, transmitted data will be
delayed by one Byte, but the length counter will still increment for the first (empty) Byte transmission.
When the counter reaches LENGTH.LEN, the internal length counter, Rx Byte counter, and Tx Byte
counter are reset. If multiple lengths are to be transmitted, INTFLAG.TXC must go high before writing
DATA for subsequent lengths.
If there is a Length Error (STATUS.LENERR), the remaining Bytes in the length will be transmitted at the
beginning of the next frame. If this is not desired, the SERCOM must be disabled and re-enabled in order
to flush the Tx and Rx pipelines.
Writing the LENGTH register while a frame is in progress will produce unpredictable results. If
LENGTH.LENEN is not configured and a frame is not a multiple of 4 Bytes (while
SS is low), the
remainder will be transmitted in the next frame.
32-bit Extension Master Operation
When using the SPI configured as Master, the Length and the Length Enable bit fields (LENGTH.LEN
and LENGTH.LENEN) must be written before the frame begins. When LENGTH.LENEN is written to '1',
the value of LENGTH.LEN determines the number of data bytes in the transaction from 1 to 255.
For receive data, INTFLAG.RXC is raised every 4 Bytes received. If LENGTH.LEN is not a multiple of 4
Bytes, the final INTFLAG.RXC is set when the final byte is received.
For transmit, there is a holding buffer for the 32-bit data in the core domain. Once DATA has been
registered in the core domain, INTFLAG.DRE will be raised so that the next 32 bits can be written to the
DATA register.
If multiple lengths are to be transmitted, INTFLAG.TXC must go high before writing DATA for subsequent
lengths.
SAM D5x/E5x Family Data Sheet
SERCOM SPI – SERCOM Serial Peripheral Interface
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 980