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Figure 35-7. Hardware Controlled SS
_SS
SCK
T
T = 1 to 2 baud cycles
T
T
T
T
When CTRLB.MSSEN=0, the SS pin(s) is/are controlled by user software and normal GPIO.
35.6.3.6 Slave Select Low Detection
In Slave mode, the SPI can wake the CPU when the slave select (SS) goes low. When the Slave Select
Low Detect is enabled (CTRLB.SSDE=1), a high-to-low transition will set the Slave Select Low Interrupt
flag (INTFLAG.SSL) and the device will wake-up if applicable.
35.6.3.7 Master Inter-Character Spacing
When configured as master, inter-character spacing can be increased by writing a non-zero value to the
Inter-Character Spacing bit field in the Control C register (CTRLC.ICSPACE). When non-zero,
CTRLC.ICSPACE represents the minimum number of baud cycles that the SCK clock line does not toggle
and the next character is stalled.
The figure gives an example for CTRLC.ICSPACE=4; In this case, the SCK is inactive for 4 baud cycles.
Figure 35-8. Four Cycle Inter-Character Spacing Example
SCK
T = 1 baud cycle
T
T
T T
35.6.3.8 32-bit Extension
For better system bus utilization, 32-bit data receive and transmit can be enabled by writing to the Data
32-bit bit field in the Control C register (CTRLC.DATA32B=1). When enabled, write and read transaction
to/from the DATA register are 32 bit in size.
If frames are not multiples of 4 Bytes, the Length Counter (LENGTH.LEN) and Length Enable
(LENGTH.LENEN) must be configured before data transfer begins. LENGTH.LEN must be enabled only
when CTRLC.DATA32B is enabled.
The figure below shows the order of transmit and receive when using 32-bit mode. Bytes are transmitted
or received and stored in order from 0 to 3.
Only 8-bit character size is supported.
Figure 35-9. 32-bit Extension Byte Ordering
BYTE0
BYTE1
BYTE2
BYTE3
APB Write/Read
31 0
Bit Position
32-bit Extension Slave Operation
The figure below shows a transaction with 32-bit Extension enabled (CTRLC.DATA32B=1). When
address recognition is enabled (CTRLA.FORM=0x2) and there is an address match, the address is
SAM D5x/E5x Family Data Sheet
SERCOM SPI – SERCOM Serial Peripheral Interface
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 979