Datasheet

TXPO TxD Pin Location XCK Pin Location (When
Applicable)
RTS/TE CTS
0x0 SERCOM PAD[0] SERCOM PAD[1] N/A N/A
0x1 Reserved
0x2 SERCOM PAD[0] N/A SERCOM PAD[2] SERCOM PAD[3]
0x3 SERCOM_PAD[0] SERCOM_PAD[1] SERCOM_PAD[2] N/A
Bits 15:13 – SAMPR[2:0] Sample Rate
These bits select the sample rate.
These bits are not synchronized.
SAMPR[2:0] Description
0x0 16x over-sampling using arithmetic baud rate generation.
0x1 16x over-sampling using fractional baud rate generation.
0x2 8x over-sampling using arithmetic baud rate generation.
0x3 8x over-sampling using fractional baud rate generation.
0x4 3x over-sampling using arithmetic baud rate generation.
0x5-0x7 Reserved
Bit 10 – RXINV Receive Data Invert
This bit controls whether the receive data (RxD) is inverted or not.
Note: Start, parity and stop bit(s) are unchanged. When enabled, parity is calculated on the inverted
data.
Value Description
0
RxD is not inverted.
1
RxD is inverted.
Bit 9 – TXINV Transmit Data Invert
This bit controls whether the transmit data (TxD) is inverted or not.
Note: Start, parity and stop bit(s) are unchanged. When enabled, parity is calculated on the inverted
data.
Value Description
0
TxD is not inverted.
1
TxD is inverted.
Bit 8 – IBON Immediate Buffer Overflow Notification
This bit controls when the buffer overflow status bit (STATUS.BUFOVF) is asserted when a buffer
overflow occurs.
Value Description
0
STATUS.BUFOVF is asserted when it occurs in the data stream.
1
STATUS.BUFOVF is asserted immediately upon buffer overflow.
SAM D5x/E5x Family Data Sheet
SERCOM USART - SERCOM Synchronous and Asyn...
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 946