Datasheet

where
• D represent the data bits per frame
• S represent the sum of start and first stop bits, if present.
Table 33-3 shows the BAUD register value versus baud frequency f
BAUD
at a serial engine frequency of
48 MHz. This assumes a D value of 8 bits and an S value of 2 bits (10 bits, including start and stop bits).
Table 33-3. BAUD Register Value vs. Baud Frequency
BAUD Register Value Serial Engine CPF f
BAUD
at 100MHz Serial Engine Frequency (f
REF
)
0 – 406 161 6.211 MHz
407 – 808 162 6.211 MHz
809 – 1205 163 6.173 MHz
... ... ...
65206 31775 31.47 kHz
65207 31872 31.38 kHz
65208 31969 31.28 kHz
33.6.3 Additional Features
33.6.3.1 Address Match and Mask
The SERCOM address match and mask feature is capable of matching either one address, two unique
addresses, or a range of addresses with a mask, based on the mode selected. The match uses seven or
eight bits, depending on the mode.
33.6.3.1.1 Address With Mask
An address written to the Address bits in the Address register (ADDR.ADDR), and a mask written to the
Address Mask bits in the Address register (ADDR.ADDRMASK) will yield an address match. All bits that
are masked are not included in the match. Note that writing the ADDR.ADDRMASK to 'all zeros' will
match a single unique address, while writing ADDR.ADDRMASK to 'all ones' will result in all addresses
being accepted.
Figure 33-4. Address With Mask
rx shift register
ADDRMASK
ADDR
==
Match
33.6.3.1.2 Two Unique Addresses
The two addresses written to ADDR and ADDRMASK will cause a match.
SAM D5x/E5x Family Data Sheet
SERCOM – Serial Communication Interface
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 919