Datasheet

33.6.2 Basic Operation
33.6.2.1 Initialization
The SERCOM must be configured to the desired mode by writing the Operating Mode bits in the Control
A register (CTRLA.MODE). Refer to table SERCOM Modes for details.
Table 33-1. SERCOM Modes
CTRLA.MODE Description
0x0 USART with external clock
0x1 USART with internal clock
0x2 SPI in slave operation
0x3 SPI in master operation
0x4 I
2
C slave operation
0x5 I
2
C master operation
0x6-0x7 Reserved
For further initialization information, see the respective SERCOM mode chapters:
Related Links
34. SERCOM USART - SERCOM Synchronous and Asynchronous Receiver and Transmitter
35. SERCOM SPI – SERCOM Serial Peripheral Interface
36. SERCOM I2C – Inter-Integrated Circuit
33.6.2.2 Enabling, Disabling, and Resetting
This peripheral is enabled by writing '1' to the Enable bit in the Control A register (CTRLA.ENABLE), and
disabled by writing '0' to it.
Writing ‘1’ to the Software Reset bit in the Control A register (CTRLA.SWRST) will reset all registers of
this peripheral to their initial states, except the DBGCTRL register, and the peripheral is disabled.
Refer to the CTRLA register description for details.
33.6.2.3 Clock Generation – Baud-Rate Generator
The baud-rate generator, as shown in Figure 33-3, generates internal clocks for asynchronous and
synchronous communication. The output frequency (f
BAUD
) is determined by the Baud register (BAUD)
setting and the baud reference frequency (f
ref
). The baud reference clock is the serial engine clock, and it
can be internal or external.
For asynchronous communication, the /16 (divide-by-16) output is used when transmitting, whereas
the /1 (divide-by-1) output is used while receiving.
For synchronous communication, the /2 (divide-by-2) output is used.
This functionality is automatically configured, depending on the selected operating mode.
SAM D5x/E5x Family Data Sheet
SERCOM – Serial Communication Interface
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 917