Datasheet

32.5.8 Register Access Protection
All registers with write access can be optionally write-protected by the Peripheral Access Controller
(PAC).
Note: Optional write protection is indicated by the "PAC Write Protection" property in the register
description.
Write protection does not apply for accesses through an external debugger.
Related Links
27. PAC - Peripheral Access Controller
32.5.9 Analog Connections
Analog functions are connected directly between the analog blocks and the I/O pads using analog buses.
However, selecting an analog peripheral function for a given pin will disable the corresponding digital
features of the pad.
32.6 Functional Description
Figure 32-2. Overview of the PORT
PULLENx
OUTx
DIRx
INENx
PORT PAD
VDD
INEN
OE
OUT
PULLEN
PAD
Pull
Resistor
PG
NG
Input to Other Modules Analog Input/Output
IN
INx
APB Bus
Synchronizer
Q D
R
R
DQ
DRIVEx
DRIVE
32.6.1 Principle of Operation
Each PORT group of up to 32 pins is controlled by the registers in PORT, as described in the figure.
These registers in PORT are duplicated for each PORT group, with increasing base addresses. The
number of PORT groups may depend on the package/number of pins.
SAM D5x/E5x Family Data Sheet
PORT - I/O Pin Controller
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 886