Datasheet

31.5.3 Interrupts
The EVSYS has the following interrupt sources for each channel:
• Overrun Channel n interrupt (OVR)
• Event Detected Channel n interrupt (EVD)
These interrupts events are asynchronous wake-up sources.
Each interrupt source has an interrupt flag associated with it. The interrupt flag in the corresponding
Channel n Interrupt Flag Status and Clear (CHINTFLAG) register is set when the interrupt condition
occurs.
Note: Interrupts must be globally enabled to allow the generation of interrupt requests.
Each interrupt can be individually enabled by writing a '1' to the corresponding bit in the Channel n
Interrupt Enable Set (CHINTENSET) register, and disabled by writing a '1' to the corresponding bit in the
Channel n Interrupt Enable Clear (CHINTENCLR) register. An interrupt request is generated when the
interrupt flag is set and the corresponding interrupt is enabled. The interrupt request remains active until
the interrupt flag is cleared, the interrupt is disabled or the Event System is reset. All interrupt requests
are ORed together on system level to generate one combined interrupt request to the NVIC.
The user must read the Channel Interrupt Status (INTSTATUS) register to identify the channels with
pending interrupts, and must read the Channel n Interrupt Flag Status and Clear (CHINTFLAG) register
to determine which interrupt condition is present for the corresponding channel. It is also possible to read
the Interrupt Pending register (INTPEND), which provides the highest priority channel with pending
interrupt and the respective interrupt flags.
31.5.4 Sleep Mode Operation
The Event System can generate interrupts to wake up the device from IDLE or STANDBY sleep mode.
To be able to run in standby, the Run in Standby bit in the Channel register (CHANNELn.RUNSTDBY)
must be set to '1'. When the Generic Clock On Demand bit in Channel register
(CHANNELn.ONDEMAND) is set to '1' and the event generator is detected, the event channel will
request its clock (GCLK_EVSYS_CHANNEL_n). The event latency for a resynchronized channel path will
increase by two GCLK_EVSYS_CHANNEL_n clock (i.e., up to five GCLK_EVSYS_CHANNEL_n clock
cycles).
A channel will behave differently in different sleep modes regarding to CHANNELn.RUNSTDBY and
CHANNELn.ONDEMAND:
Table 31-1. Event Channel Sleep Behavior
CHANNELn.PAT
H
CHANNELn.
ONDEMAND
CHANNELn.
RUNSTDBY
Sleep Behavior
ASYNC 0 0 Only run in IDLE sleep modes if an event
must be propagated. Disabled in STANDBY
sleep mode.
SYNC/RESYNC 0 1 Run in both IDLE and STANDBY sleep
modes.
SAM D5x/E5x Family Data Sheet
EVSYS – Event System
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 854