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31.5.2.12 Software Event
A software event can be initiated on a channel by writing a '1' to the Software Event bit in the Channel
register (CHANNELm.SWEVT). Then the software event can be serviced as any event generator; i.e.,
when the bit is set to ‘1’, an event will be generated on the respective channel.
31.5.2.13 Interrupt Status and Interrupts Arbitration
The Interrupt Status register stores all channels with pending interrupts, as shown below.
Figure 31-2. Interrupt Status Register
CHINTFLAG31.OVR
CHINTENSET31.OVR
CHINTFLAG31.EVD
CHINTENSET31.EVD
CHINTFLAG0.OVR
CHINTENSET0.OVR
CHINTFLAG0.EVD
CHINTENSET0.EVD
31 0
INTSTATUS
130
The Event System can arbitrate between all channels with pending interrupts. The arbiter can be
configured to prioritize statically or dynamically the incoming events. The priority is evaluated each time a
new channel has an interrupt pending, or an interrupt has been cleared. The Channel Pending Interrupt
register (INTPEND) will provide the channel number with the highest interrupt priority, and the
corresponding channel interrupt flags and status bits.
By default, static arbitration is enabled (PRICTRL.RRENx is '0'), the arbiter will prioritize a low channel
number over a high channel number as shown below. When using the status scheme, there is a risk of
high channel numbers never being granted access by the arbiter. This can be avoided using a dynamic
arbitration scheme.
SAM D5x/E5x Family Data Sheet
EVSYS – Event System
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 852