Datasheet

31.5.2.7 Edge Detection
When synchronous or resynchronized paths are used, edge detection must be enabled. The event
system can execute edge detection in three different ways:
• Generate an event only on the rising edge
• Generate an event only on the falling edge
• Generate an event on rising and falling edges.
Edge detection is selected by writing to the Edge Selection bit group of the Channel register
(CHANNELn.EDGSEL).
31.5.2.8 Event Latency
An event from an event generator is propagated to an event user with different latency, depending on
event channel configuration.
• Asynchronous Path: The maximum routing latency of an external event is related to the internal
signal routing and it is device dependent.
• Synchronous Path: The maximum routing latency of an external event is one
GCLK_EVSYS_CHANNEL_n clock cycle.
• Resynchronized Path: The maximum routing latency of an external event is three
GCLK_EVSYS_CHANNEL_n clock cycles.
The maximum propagation latency of a user event to the peripheral clock core domain is three peripheral
clock cycles.
The event generators, event channel and event user clocks ratio must be selected in relation with the
internal event latency constraints. Events propagation or event actions in peripherals may be lost if the
clock setup violates the internal latencies.
31.5.2.9 The Overrun Channel n Interrupt
The Overrun Channel n Interrupt flag in the Interrupt Flag Status and Clear register (CHINTFLAGn.OVR)
will be set, and the optional interrupt will be generated in the following cases:
• One or more event users on channel n is not ready when there is a new event
• An event occurs when the previous event on channel m has not been handled by all event users
connected to that channel
The flag will only be set when using synchronous or resynchronized paths. In the case of asynchronous
path, the CHINTFLAGn.OVR is always read as zero.
31.5.2.10 The Event Detected Channel n Interrupt
The Event Detected Channel n Interrupt flag in the Interrupt Flag Status and Clear register
(CHINTFLAGn.EVD) is set when an event coming from the event generator configured on channel n is
detected.
The flag will only be set when using a synchronous or resynchronized path. In the case of an
asynchronous path, the CHINTFLAGn.EVD is always zero.
31.5.2.11 Channel Status
The Channel Status register (CHSTATUS) shows the status of the channels when using a synchronous or
resynchronized path. There are two different status bits in CHSTATUS for each of the available channels:
• The CHSTATUSn.BUSYCH bit will be set when an event on the corresponding channel n has not
been handled by all event users connected to that channel.
• The CHSTATUSn.RDYUSR bit will be set when all event users connected to the corresponding
channel are ready to handle incoming events on that channel.
SAM D5x/E5x Family Data Sheet
EVSYS – Event System
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 851