Datasheet

• XOSC32KRDY - 32KHz Crystal Oscillator Ready: A 0-to-1 transition on the STATUS.XOSC32KRDY
bit is detected
• XOSC32KFAIL - Clock Failure Detector: A 0-to-1 transition on the STATUS.XOSC32KFAIL bit is
detected
All these interrupts are synchronous wake-up source.
Each interrupt source has an interrupt flag associated with it. The interrupt flag in the Interrupt Flag Status
and Clear register (INTFLAG) is set when the interrupt condition occurs. Each interrupt can be enabled
individually by setting the corresponding bit in the Interrupt Enable Set register (INTENSET), and disabled
by setting the corresponding bit in the Interrupt Enable Clear register (INTENCLR). An interrupt request is
generated when the interrupt flag is set and the corresponding interrupt is enabled. The interrupt request
remains active until the interrupt flag is cleared, the interrupt is disabled or the OSC32KCTRL is reset.
See the INTFLAG register for details on how to clear interrupt flags.
The OSC32KCTRL has one common interrupt request line for all the interrupt sources. The user must
read the INTFLAG register to determine which interrupt condition is present. Refer to the INTFLAG
register for details.
Note: Interrupts must be globally enabled for interrupt requests to be generated.
Related Links
18. PM – Power Manager
10.2 Nested Vector Interrupt Controller
29.6.8 Events
The CFD can generate the following output event:
• Clock Failure Detector (XOSC32KFAIL): Generated when the Clock Failure Detector status bit is set
in the Status register (STATUS.XOSC32KFAIL). The CFD event is not generated when the Clock
Switch bit (STATUS.SWBACK) in the Status register is set.
Writing a '1' to an Event Output bit in the Event Control register (EVCTRL.CFDEO) enables the CFD
output event. Writing a '0' to this bit disables the CFD output event. Refer to the Event System chapter for
details on configuring the event system.
SAM D5x/E5x Family Data Sheet
OSC32KCTRL – 32KHz Oscillators Controller
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 818